参数资料
型号: ADSP-BF561SKBZ500
厂商: Analog Devices Inc
文件页数: 16/64页
文件大小: 0K
描述: IC DSP 32BIT 500MHZ 297PBGA
产品培训模块: Interfacing AV Converters to Blackfin Processors
Blackfin® Processor Core Architecture Overview
Blackfin® Device Drivers
Blackfin® Optimizations for Performance and Power Consumption
Blackfin® System Services
标准包装: 1
系列: Blackfin®
类型: 定点
接口: SPI,SSP,UART
时钟速率: 500MHz
非易失内存: 外部
芯片上RAM: 328kB
电压 - 输入/输出: 2.50V,3.30V
电压 - 核心: 1.25V
工作温度: 0°C ~ 70°C
安装类型: 表面贴装
封装/外壳: 297-BGA
供应商设备封装: 297-PBGA(27x27)
包装: 托盘
配用: ADZS-BFAUDIO-EZEXT-ND - BOARD EVAL AUDIO BLACKFIN
ADZS-BF561-EZLITE-ND - BOARD EVAL ADSP-BF561
ADZS-BF561-MMSKIT-ND - KIT STARTER MULTIMEDIA BF561
ADZS-BFAV-EZEXT-ND - BOARD DAUGHT ADSP-BF533,37,61KIT
ADSP-BF561 
In addition to the software and hardware development tools
available from Analog Devices, third parties provide a wide
range of tools supporting the Blackfin processor family. Third
party software tools include DSP libraries, real-time operating
systems, and block diagram design tools.
EZ-KIT Lite Evaluation Board
For evaluation of ADSP-BF561 processors, use the
ADSP-BF561 EZ-KIT Lite ? board available from Analog
Devices. Order part number ADDS-BF561-EZLITE. The board
comes with on-chip emulation capabilities and is equipped to
enable software development. Multiple daughter cards are
available.
DESIGNING AN EMULATOR-COMPATIBLE
PROCESSOR BOARD
The Analog Devices family of emulators are tools that every sys-
tem developer needs to test and debug hardware and software
systems. Analog Devices has supplied an IEEE 1149.1 JTAG
Test Access Port (TAP) on the ADSP-BF561. The emulator uses
the TAP to access the internal features of the processor, allow-
ing the developer to load code, set breakpoints, observe
variables, observe memory, and examine registers. The proces-
sor must be halted to send data and commands, but once an
operation has been completed by the emulator, the processor is
set running at full speed with no impact on system timing.
To use these emulators, the target board must include a header
that connects the processor’s JTAG port to the emulator.
For details on target board design issues, including mechanical
layout, single processor connections, multiprocessor scan
chains, signal buffering, signal termination, and emulator pod
logic, see Analog Devices JTAG Emulation Technical Reference
(EE-68) on the Analog Devices website ( www.analog.com )—use
site search on “EE-68.” This document is updated regularly to
keep pace with improvements to emulator support.
RELATED DOCUMENTS
The following publications that describe the ADSP-BF561 pro-
cessors (and related processors) can be ordered from any
Analog Devices sales office or accessed electronically on our
website:
?  Getting Started With Blackfin Processors
?  ADSP-BF561 Blackfin Processor Hardware Reference
?  ADSP-BF53x/BF56x Blackfin Processor Programming  
Reference 
? ADSP-BF561 Blackfin Processor Anomaly List
Rev. E |
Page 16 of 64 |
September 2009
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ADSP-BF561SKBZ500 制造商:Analog Devices 功能描述:Digital Signal Processor IC
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