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| 型号： | ADT7473ARQZ-1RL |
| 厂商： | ON Semiconductor |
| 文件页数： | 19/73页 |
| 文件大小： | 0K |
| 描述： | IC REMOTE THERMAL CTLR 16QSOP |
| 产品变化通告： | MFG CHG Notification ADI to ON Semi |
| 标准包装： | 2,500 |
| 系列： | dBCool® |
| 功能： | 风扇控制，温度监控器 |
| 传感器类型： | 内部和外部 |
| 感应温度： | -40°C ~ 125°C |
| 精确度： | ±2.5% |
| 拓扑： | ADC，比较器，风扇速度计数器，多路复用器，寄存器库 |
| 输出类型： | SMBus? |
| 输出警报： | 无 |
| 输出风扇： | 是 |
| 电源电压： | 3 V ~ 3.6 V |
| 工作温度： | -40°C ~ 125°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 16-SSOP（0.154"，3.90mm 宽） |
| 供应商设备封装： | 16-QSOP |
| 包装： | 带卷 (TR) |
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ADT7473
automatic fan speed control mode. Register 0x6A to
Register 0x6C are the THERM limits. When a temperature
exceeds its THERM limit, all PWM outputs run at 100%
Table 25. THERM LIMIT REGISTER
Register Description
Default
duty cycle or the maximum PWM duty cycle
0x7A
THERM Timer Limit
0x00
(Register 0x38, Register 0x39, and Register 0x3A) if Bit 3
of Configuration Register 4 (0x7D) is set. The fans remain
running at this speed until the temperature drops below
THERM minus hysteresis; this can be disabled by setting the
boost bit in Configuration Register 3 (0x78), Bit 2. The
hysteresis value for that THERM limit is the value
programmed into the hysteresis registers (Register 0x6D
and Register 0x6E). The default hysteresis value is 4 ? C.
THERM LIMIT
16-bit Limits
The fan TACH measurements are 16-bit results. The fan
TACH limits are also 16 bits, consisting of a high byte and
low byte. Because fans running under speed or stalled are
normally the only conditions of interest, only high limits
exist for fan TACHs. Because the fan TACH period is
actually being measured, exceeding the limit indicates a
slow or stalled fan.
Table 26. FAN LIMIT REGISTERS
TEMPERATURE
FANS
100%
HYSTERESIS ( ? C)
Register
0x54
0x55
0x56
Description
TACH1 Minimum Low Byte
TACH1 Minimum High Byte
TACH2 Minimum Low Byte
Default
0xFF
0xFF
0xFF
Figure 28. THERM Limit Operation
Limits, Status Registers, and Interrupts
Limit Values
Associated with each measurement channel on the
0x57
0x58
0x59
0x5A
0x5B
TACH2 Minimum High Byte
TACH3 Minimum Low Byte
TACH3 Minimum High Byte
TACH4 Minimum Low Byte
TACH4 Minimum High Byte
0xFF
0xFF
0xFF
0xFF
0xFF
ADT7473/ADT7473 ? 1 are high and low limits. These can
form the basis of system status monitoring; a status bit can
be set for any out-of-limit condition and is detected by
polling the device. Alternatively, SMBALERT interrupts
can be generated to flag a processor or microcontroller of
out-of-limit conditions.
8-bit Limits
The following is a list of 8-bit limits on the ADT7473/
ADT7473 ? 1.
Table 23. VOLTAGE LIMIT REGISTERS
Out-of-Limit Comparisons
Once all limits have been programmed, the ADT7473/
ADT7473 ? 1 can be enabled for monitoring. The ADT7473/
ADT7473 ? 1 measures all voltage and temperature
measurements in round-robin format and sets the
appropriate status bit for out-of-limit conditions. TACH
measurements are not part of this round-robin cycle.
Comparisons are done differently depending on whether the
measured value is being compared to a high or low limit.
High limit > comparison performed
Register
0x46
0x47
0x48
0x49
Description
V CCP Low Limit
V CCP High Limit
V CC Low Limit
V CC High Limit
Default
0x00
0xFF
0x00
0xFF
Low limit ? comparison performed
Voltage and temperature channels use a window
comparator for error detecting and, therefore, have high and
low limits. Fan speed measurements use only a low limit.
This fan limit is needed only in manual fan control mode.
Table 24. TEMPERATURE LIMIT REGISTERS
Register Description
Default
Analog Monitoring Cycle Time
The analog monitoring cycle begins when a 1 is written to
the start bit (Bit 0) of Configuration Register 1 (0x40). By
0x4E
0x4F
0x6A
0x50
0x51
0x6B
0x52
0x53
0x6C
Remote 1 Temperature Low Limit
Remote 1 Temperature High Limit
Remote 1 THERM Limit
Local Temperature Low Limit
Local Temperature High Limit
Local THERM Temperature Limit
Remote 2 Temperature Low Limit
Remote 2 Temperature High Limit
Remote 2 THERM Temp. Limit
0x01
0xFF
0xA4
0x01
0xFF
0xA4
0x01
0xFF
0xA4
default, the ADT7473/ADT7473 ? 1 powers up with this bit
set. The ADC measures each analog input in turn and, as
each measurement is completed, the result is automatically
stored in the appropriate value register. This round-robin
monitoring cycle continues unless disabled by writing a 0 to
Bit 0 of Configuration Register 1.
As the ADC is normally left to free-run in this manner, the
time taken to monitor all the analog inputs is normally not
of interest, because the most recently measured value of any
input can be read out at any time.
http://onsemi.com
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