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| 型号： | ADT7473ARQZ-REEL |
| 厂商： | ON Semiconductor |
| 文件页数： | 22/73页 |
| 文件大小： | 0K |
| 描述： | IC REMOTE THERMAL CTLR 16QSOP |
| 产品变化通告： | MFG CHG Notification ADI to ON Semi |
| 标准包装： | 2,500 |
| 系列： | dBCool® |
| 功能： | 风扇控制，温度监控器 |
| 传感器类型： | 内部和外部 |
| 感应温度： | -40°C ~ 125°C |
| 精确度： | ±2.5% |
| 拓扑： | ADC，比较器，风扇速度计数器，多路复用器，寄存器库 |
| 输出类型： | SMBus? |
| 输出警报： | 无 |
| 输出风扇： | 是 |
| 电源电压： | 3 V ~ 3.6 V |
| 工作温度： | -40°C ~ 125°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 16-SSOP（0.154"，3.90mm 宽） |
| 供应商设备封装： | 16-QSOP |
| 包装： | 带卷 (TR) |
| 其它名称： | ADT7473ARQZ-REEL-ND ADT7473ARQZ-REELOSTR |
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ADT7473
Table 30. INTERRUPT MASK REGISTER 2
(REG. 0X75)
Bit Mnemonic Description
THERM as an Input
When THERM is configured as an input, the
ADT7473/ADT7473 ? 1 can time assertions on t he THERM
pin. This can be useful for connecting to the PROCHOT
7
6
5
4
3
2
1
0
D2
D1
FAN4
FAN3
FAN2
FAN1
OVT
?
1 masks SMBALERT for Diode 2 errors.
1 masks SMBALERT for Diode 1 errors.
1 masks SMBALERT for Fan 4 failure. If
the TACH4 pin is being used as the
THERM input, this bit masks
SMBALERT for a THERM event.
1 masks SMBALERT for Fan 3.
1 masks SMBALERT for Fan 2.
1 masks SMBALERT for Fan 1.
1 masks SMBALERT for
overtemperature (exceeding THERM
limits).
Unused
output o f a CPU to gauge system performance. See the
THERM Timer section for more information.
The user can also set up the ADT7473/ADT7473 ? 1 so
that, when the THERM pin is driven low externally, the fans
run at 100%. The fans run at 100% for the duration of the
time the THERM pin is pulled low. This is done by setting
the BOOST bit (Bit 2) in Configuration Register 3 (0x78)
to 1. This works only if the fan is already running, for
example, in manual mode when the current duty cycle is
above 0x00, or in automatic mode when the temperature is
above T MIN . If the temperature is below T MIN or if the duty
cycle in manual mode is set to 0x00, then pulling the
THERM low externally has no effect. See Figure 31 for
Enabling the SMBALERT Interrupt Output
The SMBALERT interrupt function is disabled by default.
Pin 5 or Pin 9 can be reconfigured as an SMBALERT output
to signal out-of-limit conditions. (SMBALERT function is
available only on Pin 9 of ADT7473 ? 1.)
Table 31. ADT7473 CONFIGURING PIN 5 AS
SMBALERT OUTPUT
more information.
T MIN
THERM
Register
Configuration Register 3
(Register 0x78)
Bit Setting
<0> ALERT = 1
IS BELOW T MIN
The ADT7473 ? 1 THERM_LATCH function latches and
asserts when temperature rises 0.25 ? C above the THERM
limit for the selected remote channel. Due to a THERM
event, the fans spin at full speed. This can be disabled by
setting Bit 2 in Configuration Register 0x7D.
Pin 5 remains latched until temperature falls below
THERM limit for the selected zone, Remote Channel D1 or
Remote Channel D2, and Bit 0 in Status Register 2 is
cleared. By default on the ADT7473 ? 1, the THERM limit is
set as 136 ? C for Remote Channel 2 and 100 ? C for Remote
Channel 1.
Assigning THERM Functionality to a Pin
Pin 9 on the ADT7473/ADT7473 ? 1 has four possible
functions: SMBALERT, THERM, GPIO, and TACH4. The
user chooses the required functionality by setting Bit 0 and
Bit 1 of Configuration Register 4 (0x7D).
Table 32. CONFIGURATION REGISTER 4 (REG. 0X7D)
THERM ASSERTED TO LOW AS
AN INPUT. FANS DO NOT GO
TO 100% BECAUSE TEMPERATURE
THERM ASSERTED TO LOW AS
AN INPUT. FANS DO NOT GO TO
100% BECAUSE TEMPERATURE
IS ABOVE T MIN
Figure 31. Asserting THERM Low as an Input in
Automatic Fan Speed Control Mode
THERM Timer
The ADT7473/ADT7473 ? 1 has an internal timer to
measure THERM assertion time. F or example , the THERM
input can be connected to the PROCHOT output of a
Pentium ? 4 CPU to measure system performance. The
THERM input can also be connected to the output of a trip
point temperature sensor.
The timer is started on the assertion of the
ADT7473/ADT7473 ? 1 THERM input and stopped when
THERM is deasserted. The timer counts THERM times
Bit 1
0
0
1
1
Bit 0
1
0
1
0
Function
TACH4
THERM
SMBusALERT
GPIO
cumulatively; that is, the timer resumes counting on the next
THERM assertion. The THERM timer continues to
accumulate THERM assertion times until the timer is read (it
is cleared on read) or until it reaches full scale. If the counter
reaches full scale, it stops at that reading until cleared.
The 8-bit THERM timer status register (0x79) is designed
Once Pin 9 is configured as THERM, it must be enabled
by setting Bit 1 of Configuration Register 3 (0x78).
so that Bit 0 is set to 1 on the first THERM assertion. Once
the cumulative THERM assertion time has exceeded
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