参数资料
型号: ADT7476AARQZ-R
厂商: ON Semiconductor
文件页数: 25/66页
文件大小: 945K
描述: IC REMOTE THERMAL CTLR 24QSOP
产品变化通告: MFG CHG Notification ADI to ON Semi
QSOP 24ld Pkg (MSL) Change 17/Jun/2010
标准包装: 2,500
系列: dBCool®
功能: 风扇控制,温度监控器
传感器类型: 内部和外部
感应温度: -40°C ~ 125°C
精确度: ±2.5%
拓扑: ADC,比较器,风扇速度计数器,多路复用器,寄存器库
输出类型: SMBus?
输出警报:
输出风扇:
电源电压: 3 V ~ 3.6 V
工作温度: -40°C ~ 125°C
安装类型: 表面贴装
封装/外壳: 24-SSOP(0.154",3.90mm 宽)
供应商设备封装: 24-QSOP
包装: 带卷 (TR)
其它名称: ADT7476AARQZ-R-ND
ADT7476AARQZ-ROSTR
ADT7476A
http://onsemi.com
25
below the thermal limit. Because the temperature for that
channel is measured only once for every monitoring cycle,
after THERM
 asserts, it is guaranteed to remain low for at
least one monitoring cycle.
The THERM
 pin can be configured to assert low, if the
Remote 1, local, or Remote 2 THERM
 temperature limits
are exceeded by 0.25癈. The THERM
 temperature limit
registers   are   at   Register 0x6A,   Register 0x6B,   and
Register 0x6C,   respectively.   Setting   Bits [5:7]   of
Configuration Register 5 (0x7C) enables the THERM
output feature for the Remote 1, local, and Remote 2
temperature channels, respectively. Figure 34 shows how
the THERM
 pin asserts low as an output in the event of a
critical overtemperature.
Figure 34. Asserting THERM
 as an Output, Based on
Tripping THERM
 Limits
THERM
 LIMIT
MONITORING
CYCLE
TEMP
THERM
0.255C
THERM
 LIMIT
An alternative method of disabling THERM
 is to program
the THERM
 temperature limit to 63癈 or less in Offset 64
mode, or 128癈 or less in twos complement mode; that is,
for THERM
 temperature limit values less than 63癈 or
128癈, respectively, THERM
 is disabled.
Enabling and Disabling THERM on individual Channels
THERM
  can be enabled/disabled for individual or
combinations of temperature channels using Bits [7:5] of
Configuration Register 5 (0x7C).
THERM
 Hysteresis
Setting Bit 0 of Configuration Register 7 (0x11) disables
THERM
 hysteresis.
If THERM
 hysteresis is enabled and THERM
 is disabled
(Bit 2 of Configuration Register 4, 0x7D), the THERM
 pin
does not assert low when a THERM
  event occurs. If
THERM
 hysteresis is disabled and THERM
 is disabled
(Bit 2 of Configuration Register 4, 0x7D) and assuming the
appropriate pin is configured as THERM
), the THERM
 pin
asserts low when a THERM
 event occurs.
If THERM
 and THERM
 hysteresis are both enabled, the
THERM
 output asserts as expected.
THERM
 Operation in Manual Mode
In manual mode, THERM
 events do not cause fans to go
to full speed, unless Bit 3 of Configuration Register 6
(0x10) is set to 1.
Additionally, Bit 3 of Configuration Register 4 (0x7D)
can be used to select the PWM speed on a THERM
 event
(100% or maximum PWM).
Bit 2 in Configuration Register 4 (0x7D) can be set to
disable THERM
 events from affecting the fans.
Fan Drive Using PWM Control
The ADT7476A uses pulse-width modulation (PWM) to
control fan speed. This relies on varying the duty cycle (or
on/off ratio) of a square wave applied to the fan to vary the
fan speed. The external circuitry required to drive a fan using
PWM control is extremely simple. For 4-wire fans, the
PWM drive might need only a pullup resistor. In many cases,
the 4-wire fan PWM input has a built-in, pullup resistor.
The ADT7476A PWM frequency can be set to a selection
of low frequencies or a single high PWM frequency. The
low frequency options are used for 3-wire fans, while the
high frequency option is usually used with 4-wire fans.
For 3-wire fans, a single N-channel MOSFET is the only
drive device required. The specifications of the MOSFET
depend on the maximum current required by the fan being
driven and the input capacitance of the FET. Because a
10 kW (or greater) resistor must be used as a PWM pullup,
an FET with large input capacitance can cause the PWM
output to become distorted and adversely affect the fan
control range. This is a requirement only when using high
frequency PWM mode.
Typical notebook fans draw a nominal 170 mA, so SOT
devices can be used where board space is a concern. In
desktops, fans typically draw 250 mA to 300 mA each. If
you drive several fans in parallel from a single PWM output
or drive larger server fans, the MOSFET must handle the
higher current requirements. The only other stipulation is
that the MOSFET should have a gate voltage drive,
V
GS
 < 3.3 V, for direct interfacing to the PWM output pin.
The MOSFET should also have a low on resistance to ensure
that there is not a significant voltage drop across the FET,
which would reduce the voltage applied across the fan and,
therefore, the maximum operating speed of the fan.
Figure 35 shows how to drive a 3-wire fan using PWM
control.
Figure 35. Driving a 3-wire Fan Using an N-channel
MOSFET
ADT7476A
TACH
PWM
Q1
NDT3055L
12 V
FAN
3.3 V
12 V
12 V
10 kW
4.7 kW
10 kW
10 kW
TACH
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