参数资料
型号: ADT7476AARQZ-RL7
厂商: ON Semiconductor
文件页数: 24/66页
文件大小: 945K
描述: IC REMOTE THERMAL CTLR 24-QSOP
产品变化通告: MFG CHG Notification ADI to ON Semi
QSOP 24ld Pkg (MSL) Change 17/Jun/2010
Product Discontinuation 30/Sept/2011
标准包装: 1,000
系列: dBCool®
功能: 风扇控制,温度监控器
传感器类型: 内部和外部
感应温度: -40°C ~ 125°C
精确度: ±2.5%
拓扑: ADC,比较器,风扇速度计数器,多路复用器,寄存器库
输出类型: SMBus?
输出警报:
输出风扇:
电源电压: 3 V ~ 3.6 V
工作温度: -40°C ~ 125°C
安装类型: 表面贴装
封装/外壳: 24-SSOP(0.154",3.90mm 宽)
供应商设备封装: 24-QSOP
包装: 带卷 (TR)
ADT7476A
http://onsemi.com
24
Figure 33. Functional Block Diagram of THERM
 Monitoring Circuitry
COMPARATOR
THERM
2.914 s
1.457 s
728.32 ms
364.16 ms
91.04 ms
45.52 ms
22.76 ms
182.08 ms
THERM
 LIMIT
(REG. 0x7A)
2.914 s
1.457 s
728.32 ms
364.16 ms
91.04 ms
45.52 ms
22.76 ms
182.08 ms
THERM
 TIMER
(REG. 0x79)
THERM
 TIMER CLEARED ON READ
SMBALERT
F4P BIT (BIT 5)
MASK REGISTER 2 (REG. 0x75)
CLEARED
ON READ
F4P BIT (BIT 5)
STATUS REGISTER 2
OUT
IN
RESET
LATCH
1 = MASK
0 1  2  3  4  5  6  7
0
1
2
3
4
5
6
7
Configuring the Relevant THERM
 Behavior
1. Configure the desired pin as the THERM
 timer
input.
Setting Bit 1 (THERM
 timer enable) of
Configuration Register 3 (0x78) enables the
THERM
 timer monitoring functionality. This is
disabled on Pin 14 and Pin 22 by default.
Setting Bit 0 and Bit 1 (PIN14FUNC) of
Configuration Register 4 (0x7D) enables THERM
timer output functionality on Pin 22 (Bit 1 of
Configuration Register 3, THERM
, must also be
set). Pin 14 can also be used as TACH4.
2. Select the desired fan behavior for THERM
 timer
events.
Assuming the fans are running, setting Bit 2
(BOOST bit) of Configuration Register 3 (0x78)
causes all fans to run at 100% duty cycle whenever
THERM
 is asserted. This allows fail-safe system
cooling. If this bit is 0, the fans run at their current
settings and are not affected by THERM
 events. If
the fans are not already running when THERM
is asserted, then the fans do not run to full speed.
3. Select whether THERM
 timer events should
generate SMBALERT
 interrupts.
Setting Bit 5 (F4P) of Mask Register 2 (0x75) or
Bit 0 of Mask Register 1 (0x74), depending on
which pins are configured as a THERM timer,
masks SMBALERT
s when the THERM
 timer limit
value is exceeded. This bit should be cleared if
SMBALERT
s based on THERM
 events are
required.
4. Select a suitable THERM
 limit value.
This value determines whether an SMBALERT
 is
generated on the first THERM
 assertion, or if only
a cumulative THERM
 assertion time limit is
exceeded. A value of 0x00 causes an SMBALERT
to be generated on the first THERM
 assertion.
5. Select a THERM
 monitoring time.
This value specifies how often OS- or BIOS-level
software checks the THERM
 timer. For example,
BIOS can read the THERM
 timer once an hour to
determine the cumulative THERM
 assertion time.
If, for example, the total THERM
 assertion time is
<22.76 ms in Hour 1, >182.08 ms in Hour 2, and
>5.825 s in Hour 3, system performance is
degrading significantly because THERM
 is
asserting more frequently on an hourly basis.
Alternatively, OS- or BIOS-level software can
timestamp when the system is powered on. If an
SMBALERT
 is generated due to the THERM
timer limit being exceeded, another timestamp can
be taken. The difference in time can be calculated
for a fixed THERM
 timer limit time. For example,
if it takes one week for a THERM
 timer limit of
2.914 sec to be exceeded, and the next time it takes
only 1 hour, then a serious degradation in system
performance has occurred.
Configuring the THERM
 Pin as an Output
In addition to monitoring THERM
  as an input, the
ADT7476A can optionally drive THERM
 low as an output.
When PROCHOT
 is bidirectional, THERM
 can be used to
throttle the processor by asserting PROCHOT
. The user can
preprogram   system-critical   thermal   limits.   If   the
temperature exceeds a thermal limit by 0.25癈, THERM
asserts low. If the temperature is still above the thermal limit
on the next monitoring cycle, THERM
 stays low. THERM
remains asserted low until the temperature is equal to or
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