参数资料
| 型号： | ADT7476EBZEVB |
| 厂商： | ON Semiconductor |
| 文件页数： | 19/65页 |
| 文件大小： | 0K |
| 描述： | BOARD EVALUATION FOR ADT7476 |
| 产品变化通告： | MFG CHG Notification ADI to ON Semi |
| 标准包装： | 1 |
| 系列： | dBCool® |
| 类型： | 温度传感器 |
| 适用于相关产品： | ADT7476 |
| 所含物品： | 评估板 |
| 其它名称： | EVAL-ADT7476EBZ EVAL-ADT7476EBZ-ND |
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ADT7476
Single-channel ADC Conversions
Setting Bit 6 of Configuration Register 2 (0x73) places
the ADT7476 into single-channel ADC conversion mode. In
this mode, the ADT7476 can be made to read a single
temperature channel only. The appropriate ADC channel is
selected by writing to Bits [7:5] of the TACH1 minimum
high byte register (0x55).
Table 22. PROGRAMMING SINGLE-CHANNEL ADC
MODE FOR TEMPERATURES
Bits [7:5], Register 0x55 Channel Selected
Limits, Status Registers, and Interrupts
Limit Values
Associated with each measurement channel on the
ADT7476 are high and low limits. These can form the basis of
system status monitoring; a status bit can be set for any
out-of-limit condition and is detected by polling the device.
Alternatively, SMBALERT interrupts can be generated to flag
out-of-limit conditions to a processor or microcontroller.
8-bit Limits
The following is a list of 8-bit limits on the ADT7476.
101
110
Remote 1 Temperature
Local Temperature
Table 24. VOLTAGE LIMIT REGISTERS
111
Remote 2 Temperature
Register
Description
Default
Table 23. CONFIGURATION REGISTER 2 (REG. 0X73)
0x44
0x45
2.5 V Low Limit
2.5 V High Limit
0x00
0xFF
Bit
[4]
[6]
Description
1: Averaging Off
1: Single-channel Convert Mode
0x46
0x47
0x48
V CCP Low Limit
V CCP High Limit
V CC Low Limit
0x00
0xFF
0x00
TACH1 Minimum High Byte (0x55)
[7:5] selects ADC channel for single-channel convert
mode.
Overtemperature Events
Overtemperature events on any of the temperature
0x49
0x4A
0x4B
0x4C
0x4D
V CC High Limit
5.0 V Low Limit
5.0 V High Limit
12 V Low Limit
12 V High Limit
0xFF
0x00
0xFF
0x00
0xFF
channels can be detected and dealt with automatically in
automatic fan speed control mode. Register 0x6A to
Register 0x6C are the THERM temperature limits. When a
temperature exceeds its THERM temperature limit, all
Table 25. TEMPERATURE LIMIT REGISTERS
Register Description
0x4E Remote 1 Temperature Low Limit
Default
0x81
PWM outputs run at the maximum PWM duty cycle
(Register 0x38, Register 0x39, and Register 0x3A).
This effectively runs the fans at the fastest allowed speed.
The fans run at this speed until the temperature drops
below THERM minus hysteresis. This can be disabled by
setting Bit 2, the boost bit, in Configuration Register 3
(0x78). The hysteresis value for the THERM temperature
limit is the value programmed into the hysteresis registers
(0x6D and 0x6E). The default hysteresis value is 4 ° C.
0x4F
0x6A
0x50
0x51
0x6B
0x52
0x53
0x6C
Remote 1 Temperature High Limit
Remote 1 THERM Temp. Limit
Local Temperature Low Limit
Local Temperature High Limit
Local THERM Temperature Limit
Remote 2 Temperature Low Limit
Remote 2 Temperature High Limit
Remote 2 THERM Temp. Limit
0x7F
0x64
0x81
0x7F
0x64
0x81
0x7F
0x64
THERM LIMIT
Table 26. T HERM TIMER LIMIT REGISTER
TEMPERATURE
HYSTERESIS ( ° C)
Register
0x7A
Description
THERM Timer Limit
Default
0x00
16-bit Limits
FANS
100%
The fan TACH measurements are 16-bit results. The fan
Figure 28. THERM Temperature Limit Operation
THERM can be disabled on specific temperature channels
using Bits [7:5] of Configuration Register 5 (0x7C).
THERM can also be disabled by:
? Writing ? 64 ° C to the appropriate THERM temperature
limit in Offset 64 mode.
? Writing ? 128 ° C to the appropriate THERM
temperature limit in twos complement mode.
TACH limits are also 16 bits, consisting of a high byte and
low byte. Because fans running under speed or stalled are
normally the only conditions of interest, only high limits
exist for fan TACHs. Because the fan TACH period is
actually being measured, exceeding the limit indicates a
slow or stalled fan.
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