参数资料
型号: ADUM1301ARWZ-RL
厂商: Analog Devices Inc
文件页数: 7/32页
文件大小: 0K
描述: IC DGITAL ISOLATOR 3CH 16-SOIC
其它图纸: ADUMx301 Series Diagram
标准包装: 1
系列: iCoupler®
输入 - 1 侧/2 侧: 2/1
通道数: 3
电源电压: 2.7 V ~ 5.5 V
电压 - 隔离: 2500Vrms
数据速率: 1Mbps
传输延迟: 65ns
输出类型: 逻辑
封装/外壳: 16-SOIC(0.295",7.50mm 宽)
供应商设备封装: 16-SOIC W
包装: 标准包装
工作温度: -40°C ~ 105°C
产品目录页面: 2766 (CN2011-ZH PDF)
其它名称: ADUM1301ARWZ-RLDKR
Data Sheet
ADuM1300/ADuM1301
Parameter
Symbol
Min
Typ
Max Unit
Test Conditions
ADuM130xBRW
Minimum Pulse Width 2
Maximum Data Rate 3
PW
10
100
ns
Mbps
C L = 15 pF, CMOS signal levels
C L = 15 pF, CMOS signal levels
Propagation Delay 4
Pulse Width Distortion, |t PLH ? t PHL | 4
t PHL , t PLH
PWD
20
38
50
3
ns
ns
C L = 15 pF, CMOS signal levels
C L = 15 pF, CMOS signal levels
Change vs. Temperature
5
ps/°C
C L = 15 pF, CMOS signal levels
Propagation Delay Skew 5
Channel-to-Channel Matching, Codirectional
t PSK
t PSKCD
26
3
ns
ns
C L = 15 pF, CMOS signal levels
C L = 15 pF, CMOS signal levels
Channels 6
Channel-to-Channel Matching, Opposing-
t PSKOD
6
ns
C L = 15 pF, CMOS signal levels
Directional Channels 6
ADuM130xCRW
Minimum Pulse Width 2
Maximum Data Rate 3
PW
90
8.3
120
11.1
ns
Mbps
C L = 15 pF, CMOS signal levels
C L = 15 pF, CMOS signal levels
Propagation Delay 4
Pulse Width Distortion, |t PLH ? t PHL | 4
t PHL , t PLH
PWD
20
34
0.5
45
2
ns
ns
C L = 15 pF, CMOS signal levels
C L = 15 pF, CMOS signal levels
Change vs. Temperature
3
ps/°C
C L = 15 pF, CMOS signal levels
Propagation Delay Skew 5
Channel-to-Channel Matching, Codirectional
t PSK
t PSKCD
16
2
ns
ns
C L = 15 pF, CMOS signal levels
C L = 15 pF, CMOS signal levels
Channels 6
Channel-to-Channel Matching, Opposing-
t PSKOD
5
ns
C L = 15 pF, CMOS signal levels
Directional Channels 6
For All Models
Output Disable Propagation Delay (High/Low to
t PHZ , t PLH
6
8
ns
C L = 15 pF, CMOS signal levels
High Impedance)
Output Enable Propagation Delay (High
t PZH , t PZL
6
8
ns
C L = 15 pF, CMOS signal levels
Impedance to High/Low)
Output Rise/Fall Time (10% to 90%)
t R /t F
3
ns
C L = 15 pF, CMOS signal levels
Common-Mode Transient Immunity at
|CM H |
25
35
kV/μs
V Ix = V DD1 or V DD2 , V CM = 1000 V,
Logic High Output 7
transient magnitude = 800 V
Common-Mode Transient Immunity at
|CM L |
25
35
kV/μs
V Ix = 0 V, V CM = 1000 V,
Logic Low Output 7
transient magnitude = 800 V
Refresh Rate
Input Dynamic Supply Current per Channel 8
Output Dynamic Supply Current per Channel 8
f r
I DDI (D)
I DDO (D)
1.1
0.10
0.03
Mbps
mA/Mbps
mA/Mbps
1
2
3
4
5
6
7
8
The supply current values are for all three channels combined when running at identical data rates. Output supply current values are specified with no output load
present. The supply current associated with an individual channel operating at a given data rate may be calculated as described in the Power Consumption section.
See Figure 6 through Figure 8 for information on per-channel supply current as a function of data rate for unloaded and loaded conditions. See Figure 9 through
Figure 12 for total V DD1 and V DD2 supply currents as a function of data rate for ADuM1300/ADuM1301 channel configurations.
The minimum pulse width is the shortest pulse width at which the specified pulse width distortion is guaranteed.
The maximum data rate is the fastest data rate at which the specified pulse width distortion is guaranteed.
t PHL propagation delay is measured from the 50% level of the falling edge of the V Ix signal to the 50% level of the falling edge of the V Ox signal. t PLH propagation delay is
measured from the 50% level of the rising edge of the V Ix signal to the 50% level of the rising edge of the V Ox signal.
t PSK is the magnitude of the worst-case difference in t PHL or t PLH that is measured between units at the same operating temperature, supply voltages, and output load
within the recommended operating conditions.
Codirectional channel-to-channel matching is the absolute value of the difference in propagation delays between any two channels with inputs on the same side of
the isolation barrier. Opposing-directional channel-to-channel matching is the absolute value of the difference in propagation delays between any two channels with
inputs on opposing sides of the isolation barrier.
CM H is the maximum common-mode voltage slew rate that can be sustained while maintaining V O > 0.8 V DD2 . CM L is the maximum common-mode voltage slew rate
that can be sustained while maintaining V O < 0.8 V. The common-mode voltage slew rates apply to both rising and falling common-mode voltage edges. The transient
magnitude is the range over which the common mode is slewed.
Dynamic supply current is the incremental amount of supply current required for a 1 Mbps increase in signal data rate. See Figure 6 through Figure 8 for information
on per-channel supply current for unloaded and loaded conditions. See the Power Consumption section for guidance on calculating the per-channel supply current
for a given data rate.
Rev. I | Page 7 of 32
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