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| 型号： | ADUM1301WSRWZ |
| 厂商： | Analog Devices Inc |
| 文件页数： | 11/32页 |
| 文件大小： | 0K |
| 描述： | IC ISOLATOR DIG 3CH 125C 16SOIC |
| 其它图纸： | ADUMx301 Series Diagram |
| 标准包装： | 47 |
| 系列： | iCoupler® |
| 输入 - 1 侧/2 侧： | 2/1 |
| 通道数： | 3 |
| 电源电压： | 2.7 V ~ 5.5 V |
| 电压 - 隔离： | 2500Vrms |
| 数据速率： | 1Mbps |
| 传输延迟： | 100ns |
| 输出类型： | 逻辑 |
| 封装/外壳： | 16-SOIC（0.295"，7.50mm 宽） |
| 供应商设备封装： | 16-SOIC W |
| 包装： | 管件 |
| 工作温度： | -40°C ~ 125°C |
| 产品目录页面： | 2766 (CN2011-ZH PDF) |
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Data Sheet
ADuM1300/ADuM1301
ELECTRICAL CHARACTERISTICS—5 V, 125°C OPERATION
All voltages are relative to their respective ground. 4.5 V ≤ V DD1 ≤ 5.5 V, 4.5 V ≤ V DD2 ≤ 5.5 V; all minimum/maximum specifications apply
over the entire recommended operation range, unless otherwise noted; all typical specifications are at T A = 25°C, V DD1 = V DD2 = 5 V. These
specifications apply to ADuM1300W and ADuM1301W automotive grade versions.
Table 4.
Parameter
Symbol
Min
Typ
Max Unit
Test Conditions
DC SPECIFICATIONS
Input Supply Current per Channel, Quiescent
Output Supply Current per Channel, Quiescent
I DDI (Q)
I DDO (Q)
0.50
0.19
0.53 mA
0.24 mA
ADuM1300W, Total Supply Current , Three Channels 1
DC to 2 Mbps
V DD1 Supply Current
V DD2 Supply Current
I DD1 (Q)
I DD2 (Q)
1.6
0.7
2.5
1.0
mA
mA
DC to 1 MHz logic signal freq.
DC to 1 MHz logic signal freq.
10 Mbps (TRWZ Grade Only)
V DD1 Supply Current
V DD2 Supply Current
I DD1 (10)
I DD2 (10)
6.5
1.9
8.1
2.5
mA
mA
5 MHz logic signal freq.
5 MHz logic signal freq.
ADuM1301W, Total Supply Current, Three Channels 1
DC to 2 Mbps
V DD1 Supply Current
V DD2 Supply Current
I DD1 (Q)
I DD2 (Q)
1.3
1.0
2.1
1.4
mA
mA
DC to 1 MHz logic signal freq.
DC to 1 MHz logic signal freq.
10 Mbps (TRWZ Grade Only)
V DD1 Supply Current
V DD2 Supply Current
I DD1 (10)
I DD2 (10)
5.0
3.4
6.2
4.2
mA
mA
5 MHz logic signal freq.
5 MHz logic signal freq.
For All Models
Input Currents
I IA , I IB , I IC , I E1 , I E2
?10
+0.01 +10
μA
0 V ≤ V IA , V IB , V IC ≤ V DD1 or V DD2 ,
0 V ≤ V E1 , V E2 ≤ V DD1 or V DD2
Logic High Input Threshold
Logic Low Input Threshold
V IH , V EH
V IL , V EL
2.0
0.8
V
V
Logic High Output Voltages
V OAH , V OBH , V OCH V DD1 , V DD2 ? 0.1 5.0
V DD1 , V DD2 ? 0.4 4.8
V
V
I Ox = ?20 μA, V Ix = V IxH
I Ox = ?4 mA, V Ix = V IxH
Logic Low Output Voltages
V OAL , V OBL , V OCL
0.0
0.04
0.2
0.1
0.1
0.4
V
V
V
I Ox = 20 μA, V Ix = V IxL
I Ox = 400 μA, V Ix = V IxL
I Ox = 4 mA, V Ix = V IxL
SWITCHING SPECIFICATIONS
ADuM130xWSRWZ
Minimum Pulse Width 2
Maximum Data Rate 3
PW
1
1000 ns
Mbps
C L = 15 pF, CMOS signal levels
C L = 15 pF, CMOS signal levels
Propagation Delay 4
Pulse Width Distortion, |t PLH ? t PHL | 4
Propagation Delay Skew 5
Channel-to-Channel Matching 6
t PHL , t PLH
PWD
t PSK
t PSKCD /t PSKOD
50
65
100
40
50
50
ns
ns
ns
ns
C L = 15 pF, CMOS signal levels
C L = 15 pF, CMOS signal levels
C L = 15 pF, CMOS signal levels
C L = 15 pF, CMOS signal levels
ADuM130xWTRWZ
Minimum Pulse Width 2
Maximum Data Rate 3
PW
10
100
ns
Mbps
C L = 15 pF, CMOS signal levels
C L = 15 pF, CMOS signal levels
Propagation Delay 4
Pulse Width Distortion, |t PLH ? t PHL | 4
t PHL , t PLH
PWD
18
27
32
3
ns
ns
C L = 15 pF, CMOS signal levels
C L = 15 pF, CMOS signal levels
Change vs. Temperature
5
ps/°C
C L = 15 pF, CMOS signal levels
Propagation Delay Skew 5
Channel-to-Channel Matching, Codirectional
t PSK
t PSKCD
15
3
ns
ns
C L = 15 pF, CMOS signal levels
C L = 15 pF, CMOS signal levels
Channels 6
Channel-to-Channel Matching, Opposing-
t PSKOD
6
ns
C L = 15 pF, CMOS signal levels
Directional Channels 6
Rev. I | Page 11 of 32
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