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| 型号： | ADUM1411ARWZ-RL |
| 厂商： | Analog Devices Inc |
| 文件页数： | 19/24页 |
| 文件大小： | 0K |
| 描述： | IC ISOLATOR DGTL QUAD 16-SOIC |
| 产品培训模块： | iCoupler Digital Isolater Technology |
| 标准包装： | 1,000 |
| 系列： | iCoupler® |
| 输入 - 1 侧/2 侧： | 3/1 |
| 通道数： | 4 |
| 电源电压： | 2.7 V ~ 5.5 V |
| 电压 - 隔离： | 2500Vrms |
| 数据速率： | 1Mbps |
| 传输延迟： | 65ns |
| 输出类型： | 逻辑 |
| 封装/外壳： | 16-SOIC（0.295"，7.50mm 宽） |
| 供应商设备封装： | 16-SOIC W |
| 包装： | 带卷 (TR) |
| 工作温度： | -40°C ~ 105°C |
Data Sheet
APPLICATIONS INFORMATION
PC BOARD LAYOUT
The ADuM141x digital isolator requires no external interface
circuitry for the logic interfaces. Power supply bypassing is
strongly recommended at the input and output supply pins
(see Figure 16). Bypass capacitors are most conveniently con-
nected between Pin 1 and Pin 2 for V DD1 , and between Pin 15
and Pin 16 for V DD2 . The capacitor value should be between
0.01 μF and 0.1 μF. The total lead length between both ends of
the capacitor and the input power supply pin should not exceed
20 mm. Bypassing between Pin 1 and Pin 8 and between Pin 9
and Pin 16 should also be considered unless both ground pins
on each package are connected together close to the package.
ADuM1410/ADuM1411/ADuM1412
DC CORRECTNESS AND MAGNETIC FIELD IMMUNITY
Positive and negative logic transitions at the isolator input
cause narrow (~1 ns) pulses to be sent to the decoder using the
transformer. The decoder is bistable and is, therefore, either set
or reset by the pulses, indicating input logic transitions. In the
absence of logic transitions at the input for more than ~1 μs, a
periodic set of refresh pulses indicative of the correct input state
is sent to ensure dc correctness at the output. If the decoder
receives no internal pulses of more than approximately 5 μs, the
input side is assumed to be unpowered or nonfunctional, in
which case the isolator output is forced to a default state (see
Table 14) by the watchdog timer circuit.
V DD1
GND 1
V IA
V DD2
GND 2
V OA
The magnetic field immunity of the ADuM141x is determined
by the changing magnetic field, which induces a voltage in the
V IB
V IC
V ID
ADuM1410
V OB
V OC
V OD
transformer’s receiving coil large enough to either falsely set or
reset the decoder. The following analysis defines the conditions
DISABLE CTRL 2
GND 1 GND 2
Figure 16. Recommended Printed Circuit Board Layout
In applications involving high common-mode transients, it
is important to minimize board coupling across the isolation
barrier. Furthermore, users should design the board layout
so that any coupling that does occur equally affects all pins
on a given component side. Failure to ensure this can cause
voltage differentials between pins exceeding the absolute
maximum ratings of the device, thereby leading to latch-up
or permanent damage. See the AN-1109 Application Note for
board layout guidelines.
PROPAGATION DELAY-RELATED PARAMETERS
Propagation delay is a parameter that describes the time it takes
a logic signal to propagate through a component. The input-to-
output propagation delay time for a high-to-low transition may
differ from the propagation delay time of a low-to-high transition.
under which this can occur. The 3 V operating condition of the
ADuM141x is examined because it represents the most suscep-
tible mode of operation.
The pulses at the transformer output have an amplitude greater
than 1.0 V. The decoder has a sensing threshold at about 0.5 V, thus
establishing a 0.5 V margin in which induced voltages can be
tolerated. The voltage induced across the receiving coil is given by
V = ( ?dβ/dt ) ∑ π r n2 ; n = 1, 2, … , N
where:
β is magnetic flux density (gauss).
r n is the radius of the n th turn in the receiving coil (cm).
N is the number of turns in the receiving coil.
Given the geometry of the receiving coil in the ADuM141x and
an imposed requirement that the induced voltage be, at most,
50% of the 0.5 V margin at the decoder, a maximum allowable
magnetic field at a given frequency can be calculated. The result
INPUT (V Ix )
OUTPUT (V Ox )
50%
t PLH
t PHL
50%
Figure 17. Propagation Delay Parameters
is shown in Figure 18.
100
10
Pulse width distortion is the maximum difference between
these two propagation delay values and an indication of how
accurately the timing of the input signal is preserved.
Channel-to-channel matching refers to the maximum amount
the propagation delay differs between channels within a single
1
0.1
0.01
ADuM141x component.
0.001
Propagation delay skew refers to the maximum amount the
propagation delay differs between multiple ADuM141x
components operating under the same conditions.
Rev. J | Page 19 of 24
1k 10k 100k 1M 10M 100M
MAGNETIC FIELD FREQUENCY (Hz)
Figure 18. Maximum Allowable External Magnetic Flux Density
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