参数资料
型号: ADUM3070ARQZ-RL7
厂商: Analog Devices Inc
文件页数: 14/20页
文件大小: 0K
描述: IC REG PUSH-PLL CTRLR ISO 16SSOP
标准包装: 1,000
类型: 推挽式控制器,隔离式
输出类型: 可调式
输出数: 1
输出电压: 3.3 V ~ 24 V
输入电压: 3V,5V
频率 - 开关: 200kHz ~ 1MHz
同步整流器:
工作温度: -40°C ~ 105°C
安装类型: 表面贴装
封装/外壳: 16-SSOP(0.154",3.90mm 宽)
包装: 管件
供应商设备封装: 16-QSOP

ADuM3070
APPLICATIONS INFORMATION
Data Sheet
The dc-to-dc converter section of the ADuM3070 uses a secondary
side controller architecture with isolated pulse-width modulation
(PWM) feedback. V DD1 power is supplied to an oscillating circuit
that switches current to the primary side of an external power
transformer using internal push-pull switches at the X1 and X2
V DD1
C IN
T1
D1
D2
L1
47μH
C OUT
47μF
R1
V ISO =
+3.3V
TO +15V
C FB
pins. Power transferred to the secondary side of the transformer
is full-wave rectified with external Schottky diodes (D1 and D2),
filtered with the L1 inductor and C OUT capacitor, and regulated
to the isolated power supply voltage from 3.3 V to 15 V. The
secondary (V ISO ) side controller regulates the output by using a
feedback voltage V FB from a resistor divider on the output and
creating a PWM control signal that is sent to the primary (V CC )
side by a dedicated i Coupler data channel labeled V FB . The primary
V DD1
V DD1
0.1μF
1 X1
2 GND 1
3 NC
4 X2
5 TP
6 TP
7 V DDA
8 GND 1
ADuM3070
16 V REG
15 GND 2
14 V DD2
13 FB
12 NC
11 NC
10 OC
9 GND 2
0.1μF
+5V
R OC
100k?
V FB
R2
47μH
side PWM converter varies the duty cycle of the X1 and X2 switches
to modulate the oscillator circuit and control the power being
sent to the secondary side. This feedback allows for significantly
higher power and efficiency.
V ISO = V FB × (R1 + R2)/R2
FOR V ISO = 3.3V OR 5V CONNECT V REG , V DD2 , AND V ISO .
Figure 31. Single Power Supply
L1
D1
T1
V ISO =
+12V TO
The ADuM3070 implements undervoltage lockout (UVLO) with
hysteresis on the V DD1 power input. This feature ensures that the
converter does enter oscillation due to noisy input power or slow
power-on ramp rates.
A minimum load current of 10 mA is recommended to ensure
V DD1
C IN
D2
D3
L2
47μH
C OUT1
47μF
C OUT2
47μF
+24V
UNREGULATED
+6V TO
+12V
C FB
R1
optimum load regulation. Smaller loads can generate excess noise
D4
on the output because of short or erratic PWM pulses. Excess
noise generated from smaller loads can cause regulation problems,
V DD1
1 X1
16 V REG
in some circumstances.
APPLICATION SCHEMATICS
The ADuM3070 has three main application schematics, as shown
in Figure 31 to Figure 33. Figure 31 has a center-tapped secondary
and two Schottky diodes providing full wave rectification for a
single output, typically for power supplies of 3.3 V, 5 V, 12 V, and
V DD1
0.1μF
2 GND 1
3 NC
4 X2
5 TP
6 TP
7 V DDA
8 GND 1
ADuM3070
15 GND 2
14 V DD2
13 FB
12 NC
11 NC
10 OC
9 GND 2
0.1μF
+5V
R OC
100k?
V FB
R2
47μH
15 V. For single supplies when V ISO = 3.3 V or V ISO = 5 V, see the
note in Figure 31 about connecting together V REG , V DD2 , and V ISO .
Figure 32 is a voltage doubling circuit that can be used for a single
supply whose output exceeds 15 V, which is the largest supply that
V ISO = V FB × (R1 + R2)/R2
FOR V ISO = 15V OR LESS, V REG CAN CONNECT TO V ISO .
Figure 32. Doubling Power Supply
L1
D1
T1
V ISO =
COARSELY
can be connected to the regulator input, V REG (Pin 16), of the part.
With Figure 32, the output voltage can be as high as 24 V and the
V REG pin is only about 12 V. When using the circuit shown in
Figure 32, to obtain an output voltage lower than 10 V (for
example, V DD1 = 3.3 V, V ISO = 5 V), connect V REG to V ISO directly.
Figure 33, which also uses a voltage doubling secondary circuit,
is shown as an example of a coarsely regulated, positive power
supply and an unregulated, negative power supply for outputs of
V DD1
C IN
V DD1
1 X1
D2
D3
D4
L2
47μH
16 V REG
C OUT1
47μF
C OUT2
47μF
REGULATED
+5V TO 15V
UNREGULATED
–5V TO –15V
C FB
R1
= V FB ×
V ISO
ADuM3070
approximately ±5 V, ±12 V, and ±15 V. For any circuit in Figure 31,
Figure 32, or Figure 33, the isolated output voltage (V ISO ) can be
set using the voltage dividers, R1 and R2 (values 1 k? to 100 k?),
using the following equation:
R1 + R2
R2
V DD1
0.1μF
2 GND 1 15 GND 2
3 NC 14 VDD2
4 X2 13 FB
5 TP 12 NC
6 TP 11 NC
7 V DDA 10 OC
8 GND 1 9 GND 2
V ISO = V FB × (R1 + R2)R2
0.1μF
+5V
R OC
100k?
V FB
R2
where V FB is the internal feedback voltage, which is
approximately 1.25 V.
Rev. 0 | Page 14 of 20
Figure 33. Positive and Unregulated Negative Supply
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