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参数资料
| 型号： | ADUM3211TRZ-RL7 |
| 厂商： | Analog Devices Inc |
| 文件页数： | 18/24页 |
| 文件大小： | 0K |
| 描述： | ISOLA DGTL 2.5KVRMS 2CH 8-SOIC |
| 标准包装： | 1,000 |
| 系列： | iCoupler® |
| 输入 - 1 侧/2 侧： | 1/1 |
| 通道数： | 2 |
| 电源电压： | 2.7 V ~ 5.5 V |
| 电压 - 隔离： | 2500Vrms |
| 数据速率： | 10Mbps |
| 传输延迟： | 50ns |
| 输出类型： | 逻辑 |
| 封装/外壳： | 8-SOIC（0.154"，3.90mm 宽） |
| 供应商设备封装： | 8-SO |
| 包装： | 带卷 (TR) |
| 工作温度： | -40°C ~ 125°C |
ADuM3210/ADuM3211
For example, at a magnetic field frequency of 1 MHz, the maxi-
mum allowable magnetic field of 0.2 kgauss induces a voltage of
0.25 V at the receiving coil. The voltage is approximately 50% of
the sensing threshold and does not cause a faulty output transition.
Similarly, if such an event occurs during a transmitted pulse (and
is of the worst-case polarity), it reduces the received pulse from
Data Sheet
POWER CONSUMPTION
The supply current at a given channel of the ADuM3210 /
ADuM3211 isolator is a function of the supply voltage, channel
data rate, and channel output load.
For each input channel, the supply current is given by
>1.0 V to 0.75 V, which is still well above the 0.5 V sensing
threshold of the decoder.
The preceding magnetic flux density values correspond to specific
current magnitudes at given distances from the ADuM3210 /
ADuM3211 transformers. Figure 14 expresses these allowable
I DDI = I DDI(Q)
I DDI = I DDI(D) × (2 f ? f r ) + I DDI(Q)
For each output channel, the supply current is given by
I DDO = I DDO(Q)
f ≤ 0.5 f r
f > 0.5 f r
f ≤ 0.5 f r
I DDO = ( I DDO(D) + (0.5 × 10 ) × C L V DDO ) × (2 f ? f r ) + I DDO(Q)
current magnitudes as a function of frequency for selected
distances. As shown in Figure 14, the ADuM3210 / ADuM3211
are immune and can be affected only by extremely large currents
operated at high frequency very close to the component. For the
1 MHz example, a 0.5 kA current placed 5 mm away from the
ADuM3210 / ADuM3211 is required to affect the operation of
the component.
1000
?3
f > 0.5 f r
where:
I DDI(D) , I DDO(D) are the input and output dynamic supply currents
per channel (mA/Mbps).
I DDI(Q) , I DDO(Q) are the specified input and output quiescent supply
currents (mA).
C L is the output load capacitance (pF).
100
10
DISTANCE = 100mm
DISTANCE = 1m
V DDO is the output supply voltage (V).
f is the input logic signal frequency (MHz, half of the input data
rate, NRZ signaling).
f r is the input stage refresh rate (Mbps).
To calculate the total I DD1 and I DD2 supply current, the supply
1
0.1
DISTANCE = 5mm
currents for each input and output channel corresponding to
I DD1 and I DD2 are calculated and totaled.
Figure 6 provides the input supply currents per channel as a
function of data rate. Figure 7 and Figure 8 provide the output
supply currents per channel as a function of data rate for an
0.01
1k
10k 100k 1M 10M
MAGNETIC FIELD FREQUENCY (Hz)
100M
unloaded output condition and for a 15 pF output condition,
respectively. Figure 9 through Figure 11 provide total I DD1 and
Figure 14. Maximum Allowable Current for Various
Current-to- ADuM3210 / ADuM3211 Spacings
I DD2 supply current as a function of data rate for the ADuM3210
and ADuM3211 channel configurations.
Note that at combinations of strong magnetic fields and high
frequency, any loops formed by the printed circuit board (PCB)
traces can induce error voltages sufficiently large to trigger the
thresholds of succeeding circuitry. Care should be taken in the
layout of such traces to avoid this possibility.
Rev. I | Page 18 of 24
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