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参数资料
型号： ADUM3473CRSZ
厂商： Analog Devices Inc
文件页数： 25/36页
文件大小： 0K
描述： ISOLAT DGTL 2.5KVRMS 4CH 20SSOP
标准包装： 66
系列： iCoupler®
输入 - 1 侧/2 侧： 1/3
通道数： 4
电源电压： 3.3V，5V
电压 - 隔离： 2500Vrms
数据速率： 25Mbps
传输延迟： 60ns
输出类型： 逻辑
封装/外壳： 20-SSOP（0.209"，5.30mm 宽）
供应商设备封装： 20-SSOP
包装： 管件
工作温度： -40°C ~ 105°C

Data Sheet
ADuM3470/ADuM3471/ADuM3472/ADuM3473/ADuM3474
APPLICATIONS INFORMATION
The dc-to-dc converter section of the ADuM347x uses a
secondary side controller architecture with isolated pulse-width
modulation (PWM) feedback. V DD1 power is supplied to an oscillat-
V DD1
C IN
T1
D1
D2
L1
47μH
C OUT
47μF
V ISO =
+3.3V
TO +15V
R1
ing circuit that switches current to the primary side of an external
power transformer using internal push-pull switches at the X1
and X2 pins. Power transferred to the secondary side of the trans-
former is full wave rectified with external Schottky diodes (D1
and D2), filtered with the L1 inductor and C OUT capacitor, and
regulated to the isolated power supply voltage from 3.3 V to 15 V.
1 X1
2 GND 1
3 NC
4 X2
5 V IA /V OA
6 V IB /V OB
7 V IC /V OC
ADuM3470/
ADuM3471/
ADuM3472/
ADuM3473/
ADuM3474
20 V REG
19 GND 2
18 V DD2
17 FB
16 V IA /V OA
15 V IB /V OB
14 V IC /V OC
0.1μF
+5V
V FB
R2
R OC 100k?
C OUT1
R1
The secondary (V ISO ) side controller regulates the output using
a feedback voltage, V FB , from a resistor divider on the output to
create a PWM control signal that is sent to the primary (V DD1 ) side
by a dedicated i Coupler data channel labeled V FB . The primary side
PWM converter varies the duty cycle of the X1 and X2 switches
to modulate the oscillator circuit and control the power being
sent to the secondary side. This feedback allows for significantly
higher power and efficiency.
The ADuM347x devices implement undervoltage lockout
(UVLO) with hysteresis on the V DDA power input. This feature
ensures that the converter does not go into oscillation due to
noisy input power or slow power-on ramp rates.
A minimum load current of 10 mA is recommended to ensure
V DD1
0.1μF
V DD1
C IN
8 V ID /V OD 13 V ID /V OD
9 V DDA 12 OC
10 GND 1 11 GND 2
V ISO = V FB × (R1 + R2)/R2
FOR V ISO = 3.3V OR 5V, CONNECT V REG , V DD2 , AND V ISO .
Figure 38. Single Power Supply
D1 L1
T1 V ISO =
+12V TO
47μH 47μF
+24V
UNREGULATED
+6V TO
+12V
D2 L2 C OUT2
47μF
47μH
D3
D4
optimum load regulation. Smaller loads can generate excess noise
on the output due to short or erratic PWM pulses. Excess noise
generated in this way can cause regulation problems in some
circumstances.
APPLICATION SCHEMATICS
The ADuM347x devices have three main application schematics,
as shown in Figure 38 to Figure 40. Figure 38 has a center-tapped
secondary and two Schottky diodes that provide full wave
V DD1
0.1μF
1 X1
2 GND 1
3 NC
4 X2
5 V IA /V OA
6 V IB /V OB
7 V IC /V OC
8 V ID /V OD
9 V DDA
10 GND 1
ADuM3470/
ADuM3471/
ADuM3472/
ADuM3473/
ADuM3474
20 V REG
19 GND 2
18 V DD2
17 FB
16 V IA /V OA
15 V IB /V OB
14 V IC /V OC
13 V ID /V OD
12 OC
11 GND 2
0.1μF
+5V
R OC 100k?
V FB
R2
rectification for a single output, typically for power supplies of
3.3 V, 5 V, 12 V, and 15 V. For single supplies when V ISO = 3.3 V
or 5 V, V REG , V DD2 , and V ISO can be connected together.
V ISO = V FB × (R1 + R2)/R2
FOR V ISO = 15V OR LESS, V REG CAN CONNECT TO V ISO .
Figure 39. Doubling Power Supply
Figure 39 shows a voltage doubling circuit that can be used for a
single supply with an output that exceeds 15 V; 15 V is the largest
supply that can be connected to the regulator input, V REG (Pin 20).
In the circuit shown in Figure 39, the output voltage can be as high
as 24 V, and the voltage at the V REG pin can be as high as 12 V.
When using the circuit shown in Figure 39 to obtain an output
voltage lower than 10 V (for example, V DD1 = 3.3 V, V ISO = 5 V),
connect V REG to V ISO directly.
V DD1
C IN
T1
D1
D2
D3
D4
L1
47μH
L2
47μH
47μF
C OUT1
C OUT2
47μF
V ISO =
COARSELY
REGULATED
+5V TO +15V
UNREGULATED
–5V TO –15V
R1
Figure 40, which also uses a voltage doubling secondary circuit,
1 X1
20 V REG
ADuM3470/
3 NC
18 V DD2
ADuM3471/
ADuM3472/
ADuM3473/ R2
ADuM3474
R OC 100k?
9 V DDA 12 OC
is an example of a coarsely regulated, positive power supply and
an unregulated, negative power supply for outputs of approxi-
mately ±5 V, ±12 V, and ±15 V.
For all the circuits shown in Figure 38 to Figure 40, the isolated
output voltage (V ISO ) can be set with the voltage dividers, R1
and R2 (values 1 k? to 100 k?) using the following equation:
V ISO = V FB × ( R1 + R2 )/ R2
where V FB is the internal feedback voltage (approximately 1.25 V).
V DD1
2 GND 1 19 GND 2
0.1μF
+5V
4 X2 17 FB
V FB
5 V IA /V OA 16 V IA /V OA
6 V IB /V OB 15 V IB /V OB
7 V IC /V OC 14 V IC /V OC
8 V ID /V OD 13 V ID /V OD
0.1μF 10 GND 1 11 GND 2
V ISO = V FB × (R1 + R2)/R2
Figure 40. Positive Supply and Unregulated Negative Supply
Rev. A | Page 25 of 36
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