参数资料
型号: ADUM4160BRWZ
厂商: Analog Devices Inc
文件页数: 10/16页
文件大小: 0K
描述: IC USB ISOLATOR FULL/LOW 16SOIC
设计资源: USB Hub Isolator Circuit (CN0158)
USB Cable Isolator Circuit (CN0159)
USB Peripheral Isolator Circuit (CN0160)
特色产品: ADuM4160 Digital Isolator
其它图纸: ADUM4160 Block Diagram
标准包装: 47
系列: iCoupler®
输入 - 1 侧/2 侧: 2/2
通道数: 2
电源电压: 3.1 V ~ 5.5 V
电压 - 隔离: 5000Vrms
数据速率: 12Mbps
传输延迟: 60ns
输出类型: 逻辑
封装/外壳: 16-SOIC(0.295",7.50mm 宽)
供应商设备封装: 16-SOIC W
包装: 管件
工作温度: -40°C ~ 105°C
产品目录页面: 2766 (CN2011-ZH PDF)
其它名称: ADUM4160BRVW
ADUM4160BRVW-ND
Q4607078

ADuM4160
APPLICATIONS INFORMATION
FUNCTIONAL DESCRIPTION
USB isolation in the D+/D? lines is challenging for several
reasons. First, access to the output enable signals is normally
required to control a transceiver. Some level of intelligence must
Data Sheet
PRODUCT USAGE
The ADuM4160 is designed to be integrated into a USB
peripheral with an upstream facing USB port as shown in
Figure 4. The key design points are:
be built into the isolator to interpret the data stream and
determine when to enable and disable its upstream and down-
stream output buffers. Second, the signal must be faithfully
reconstructed on the output side of the coupler while retaining
precise timing and not passing transient states such as invalid
SE0 and SE1 states. In addition, the part must meet the low
power requirements of the suspend mode.
The i Coupler technology is based on edge detection, and,
therefore, lends itself well to the USB application. The flow of
data through the device is accomplished by monitoring the
inputs for activity and setting the direction for data transfer
based on a transition from the idle (J) state. When data
direction is established, data is transferred until either an end-
of-packet (EOP) or a sufficiently long idle state is encountered.
At this point, the coupler disables its output buffers and
monitors its inputs for the next activity
During the data transfers, the input side of the coupler holds its
output buffers disabled. The output side enables its output buffers
and disables edge detection from the input buffers. This allows
the data to flow in one direction without wrapping back through
the coupler making the i Coupler latch. Logic is included to
1.
2.
3.
4.
5.
6.
The USB host provides power for the upstream side of the
ADuM4160 through the cable.
The peripheral supply provides power to the downstream
side of the ADuM4160 .
The DD+/DD? lines of the isolator interface with the
peripheral controller, and the UD+/UD? lines of the
isolator connect to the cable or host.
Peripheral devices have a fixed data rate that is set at design
time. The ADuM4160 has configuration pins, SPU and
SPD, that determine the buffer speed and logic convention
for each side. These must be set identically and match the
desired peripheral speed.
USB enumeration begins when either the UD+ or UD?
line is pulled high at the peripheral end of the USB cable,
which is the upstream side of the ADuM4160. Control of
the timing of this event is provided by the PIN input on the
downstream side of the coupler.
Pull-up and pull-down resistors are implemented inside
the coupler. Only external series resistors and bypass
capacitors are required for operation.
PERIPHERAL
eliminate any artifacts due to different input thresholds of the
V DD2
3.3V
differential and single-ended buffers. The input state is transferred
V BUS1
V BUS2
across the isolation barrier as one of three valid states, J, K, or
SE0. The signal is reconstructed at the output side with a fixed
USB
HOST
DD+
DD–
GND 1
ADuM4160
DD+
DD–
PIN
MICRO-
CONTROLLER
POWER
SUPPLY
time delay from the input side differential input.
The i Coupler does not have a special suspend mode, nor does it
need one because its power supply current is below the suspend
current limit of 2.5 mA when the USB bus is idle.
The ADuM4160 is designed to interface with an upstream
facing low/full speed USB port by isolating the D+/D? lines.
An upstream facing port supports only one speed of operation,
thus, the speed related parameters, J/K logic levels, and D+/D?
slew rate are set to match the speed of the upstream facing
peripheral port (see Table 10).
A control line on the downstream side of the ADuM4160 activates
a pull-up resistor integrated into the upstream side. This allows
the downstream port to control when the upstream port attaches
to the USB bus. The pin can be tied to the peripheral pull-up, a
control line, or the V DD2 pin, depending on when the initial bus
connect is to be performed.
Figure 4. Typical Application
Other than the delayed application of pull-up resistors, the
ADuM4160 is transparent to USB traffic, and no modifications
to the peripheral design are required to provide isolation. The
isolator adds propagation delay to the signals comparable to a
hub and cable. Isolated peripherals must be treated as if there
were a built-in hub when determining the maximum number of
hubs in a data chain.
Hubs can be isolated like any other peripheral. Isolated hubs
can be created by placing an ADuM4160 on the upstream port
of a hub chip. This configuration can be made compliant if
counted as two hub delays. The hub chip allows the ADuM4160
to operate at full speed yet maintains compatibility with low
speed devices.
Rev. D | Page 10 of 16
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