参数资料
型号: ADUM5200CRWZ-RL
厂商: Analog Devices Inc
文件页数: 14/28页
文件大小: 0K
描述: IC DIG ISOLATOR W/DC-DC 16SOIC
标准包装: 1,000
系列: IsoPower®, iCoupler®
输入 - 1 侧/2 侧: 2/0
通道数: 2
电源电压: 3.3V,5V
电压 - 隔离: 2500Vrms
数据速率: 25Mbps
传输延迟: 45ns
输出类型: 逻辑
封装/外壳: 16-SOIC(0.295",7.50mm 宽)
供应商设备封装: 16-SOIC W
包装: 带卷 (TR)
工作温度: -40°C ~ 105°C
ADuM5200/ADuM5201/ADuM5202
Data Sheet
V DD1 1
GND 1 2
16
15
V ISO
GND ISO
V OA 3
ADuM5202
14
V IA
V OB 4
TOP VIEW
13 V IB
RC IN 5
(Not to Scale) 12 NC
RC SEL 6
V E1 7
GND 1 8
11
10
9
V SEL
NC
GND ISO
NC = NO CONNECT
Figure 8. ADuM5202 Pin Configuration
Table 23. ADuM5202 Pin Function Descriptions
Pin No. Mnemonic Description
1
2, 8
3
4
5
6
7
9, 15
10, 12
11
13
14
16
V DD1
GND 1
V OA
V OB
RC IN
RC SEL
V E1
GND ISO
NC
V SEL
V IB
V IA
V ISO
Primary Supply Voltage, 3.0 V to 5.5 V.
Ground 1. Ground reference for the isolator primary side. Pin 2 and Pin 8 are internally connected to each other, and
it is recommended that both pins be connected to a common ground.
Logic Output A.
Logic Output B.
Regulation Control Input. This pin must be connected to the RC OUT pin of a master iso Power device or tied low. Note
that this pin must not be tied high if RC SEL is low; this combination causes excessive voltage on the secondary side,
damaging the ADuM5202 and possibly the devices that it powers.
Control Input. Determines self-regulation mode (RC SEL high) or slave mode (RC SEL low), allowing external regulation.
This pin is weakly pulled to the high state. In noisy environments, tie this pin either high or low.
Data Enable Input. When this pin is high or not connected, the primary output is active; when this pin is low, the
output is in a high-Z state.
Ground Reference for Isolator Side 2. Pin 9 and Pin 15 are internally connected to each other, and it is recommended
that both pins be connected to a common ground.
No Internal Connection.
Output Voltage Selection. When V SEL = V ISO , the V ISO setpoint is 5.0 V. When V SEL = GND ISO , the V ISO setpoint is 3.3 V.
In slave regulation mode, this pin has no function.
Logic Input B.
Logic Input A.
Secondary Supply Voltage. Output for secondary side isolated data channels and external loads.
TRUTH TABLE
Table 24. Power Section Truth Table (Positive Logic) 1
RC SEL
Input
H
H
H
H
L
L
L
RC IN
Input
X
X
X
X
H
L
RC OUT(EXT)
V SEL
Input
H
L
L
H
X
X
X
V DD1
Input (V) 2
5.0
5.0
3.3
3.3
X
X
X
V ISO (V)
5.0
3.3
3.3
5.0
X
0
X
Operation
Self regulation mode, normal operation.
Self regulation mode, normal operation.
Self regulation mode, normal operation.
This supply configuration is not recommended due to extremely poor efficiency.
Part runs at maximum open-loop voltage; therefore, damage can occur.
Power supply is disabled.
Slave mode, RC OUT(EXT) supplied by a master iso Power device.
1
2
H refers to a high logic, L refers to a low logic, and X is don’t care or unknown.
V DD1 must be common between all iso Power devices being regulated by a master iso Power part.
Rev. B | Page 14 of 28
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