参数资料
型号: ADUM5201ARWZ-RL
厂商: Analog Devices Inc
文件页数: 7/28页
文件大小: 0K
描述: IC DIG ISOLATOR W/DC-DC 16SOIC
标准包装: 1,000
系列: IsoPower®, iCoupler®
输入 - 1 侧/2 侧: 1/1
通道数: 2
电源电压: 3.3V,5V
电压 - 隔离: 2500Vrms
数据速率: 1Mbps
传输延迟: 55ns
输出类型: 逻辑
封装/外壳: 16-SOIC(0.295",7.50mm 宽)
供应商设备封装: 16-SOIC W
包装: 带卷 (TR)
工作温度: -40°C ~ 105°C
Data Sheet
ADuM5200/ADuM5201/ADuM5202
ELECTRICAL CHARACTERISTICS—5 V PRIMARY INPUT SUPPLY/3.3 V SECONDARY ISOLATED SUPPLY
All typical specifications are at T A = 25°C, V DD1 = 5.0 V, V ISO = 3.3 V, V SEL = GND ISO . Minimum/maximum specifications apply over the
entire recommended operation range which is 4.5 V ≤ V DD1 ≤ 5.5 V, 3.0 V ≤ V ISO ≤ 3.6 V; and ?40°C ≤ T A ≤ +105°C, unless otherwise
noted. Switching specifications are tested with C L = 15 pF and CMOS signal levels, unless otherwise noted.
Table 10. DC-to-DC Converter Static Specifications
Parameter
Symbol
Min
Typ
Max
Unit
Test Conditions
DC-TO-DC CONVERTER SUPPLY
Setpoint
Line Regulation
Load Regulation
Output Ripple
Output Noise
V ISO
V ISO (LINE)
V ISO (LOAD)
V ISO (RIP)
V ISO (NOISE)
3.0
3.3
1
1
50
130
3.6
5
V
mV/V
%
mV p-p
mV p-p
I ISO = 0 mA
I ISO = 50 mA, V DD1 = 3.0 V to 3.6 V
I ISO = 6 mA to 54 mA
20 MHz bandwidth, C BO = 0.1 μF||10 μF, I ISO = 90 mA
C BO = 0.1 μF||10 μF, I ISO = 90 mA
Switching Frequency
PW Modulation Frequency
f OSC
f PWM
180
625
MHz
kHz
Output Supply
Efficiency at I ISO (MAX)
I ISO (MAX)
100
30
mA
%
V ISO > 3 V
I ISO = 90 mA
I DD1 , No V ISO Load
I DD1 , Full V ISO Load
I DD1 (Q)
I DD1 (MAX)
5
230
15
mA
mA
Table 11. DC-to-DC Converter Dynamic Specifications
1 Mbps—A Grade or C Grade
25 Mbps—C Grade
Parameter
Symbol
Min
Typ
Max
Min
Typ
Max
Unit
Test Conditions
SUPPLY CURRENT
Input
No V ISO load
ADuM5200
ADuM5201
ADuM5202
I DD1
I DD1
I DD1
5
5
5
22
23
24
mA
mA
mA
Available to Load
ADuM5200
ADuM5201
ADuM5202
I ISO (LOAD)
I ISO (LOAD)
I ISO (LOAD)
100
100
100
96
95
94
mA
mA
mA
Table 12. Switching Specification s
A Grade
C Grade
Parameter
Symbol
Min
Typ
Max
Min
Typ
Max
Unit
Test Conditions
SWITCHING SPECIFICATIONS
Data Rate
1
25
Mbps
Within PWD limit
Propagation Delay
Pulse Width Distortion
t PHL , t PLH
PWD
60
100
40
45
60
6
ns
ns
50% input to 50% output
|t PLH ? t PHL |
Change vs. Temperature
5
ps/°C
Pulse Width
Propagation Delay Skew
PW
t PSK
1000
50
40
15
ns
ns
Within PWD limit
Between any two units
Channel Matching
Codirectional 1
Opposing Directional 2
t PSKCD
t PSKOD
50
50
6
15
ns
ns
Codirectional channel matching is the absolute value of the difference in propagation delays between any two channels with inputs on the same side of the isolation barrier.
1
2
7
Opposing directional channel matching is the absolute value of the difference in propagation delays between any two channels with inputs on opposing sides of the isolation barrier.
Rev. B | Page 7 of 28
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