参数资料
型号: ADUM5202ARWZ-RL
厂商: Analog Devices Inc
文件页数: 20/28页
文件大小: 0K
描述: IC DIG ISOLATOR W/DC-DC 16SOIC
标准包装: 1,000
系列: IsoPower®, iCoupler®
输入 - 1 侧/2 侧: 0/2
通道数: 2
电源电压: 3.3V,5V
电压 - 隔离: 2500Vrms
数据速率: 1Mbps
传输延迟: 55ns
输出类型: 逻辑
封装/外壳: 16-SOIC(0.295",7.50mm 宽)
供应商设备封装: 16-SOIC W
包装: 带卷 (TR)
工作温度: -40°C ~ 105°C
ADuM5200/ADuM5201/ADuM5202
With a slow V DD1 slew rate (in the millisecond range), the input
voltage is not changing quickly when V DD1 reaches the UVLO
minimum voltage. The current surge is approximately 300 mA
because V DD1 is nearly constant at the 2.7 V UVLO voltage. The
behavior during startup is similar to when the device load is a
short circuit; these values are consistent with the short-circuit
current shown in Figure 12.
When starting the device for V ISO = 5 V operation, do not limit
the current available to the V DD1 power pin to less than 300 mA.
The ADuM5200 / ADuM5201 / ADuM5202 devices may not be able
to drive the output to the regulation point if a current-limiting
device clamps the V DD1 voltage during startup. As a result, the
ADuM5200 / ADuM5201 / ADuM5202 devices can draw large
amounts of current at low voltage for extended periods of time.
The output voltage of the ADuM5200 / ADuM5201 / ADuM5202
exhibits V ISO overshoot during startup. If this could potentially
damage components attached to V ISO , then a voltage-limiting
device, such as a Zener diode, can be used to clamp the voltage.
Typical behavior is shown in Figure 17 and Figure 18.
EMI CONSIDERATIONS
The dc-to-dc converter section of the ADuM5200 / ADuM5201 /
ADuM5202 devices must operate at 180 MHz to allow efficient
power transfer through the small transformers. This creates
high frequency currents that can propagate in circuit board
ground and power planes, causing edge emissions and dipole
radiation between the primary and secondary ground planes.
Grounded enclosures are recommended for applications that use
these devices. If grounded enclosures are not possible, follow
good RF design practices in the layout of the PCB. See the
AN-0971 Application Note for board layout recommendations.
PROPAGATION DELAY PARAMETERS
Propagation delay is a parameter that describes the time it takes
a logic signal to propagate through a component. The propagation
delay to a logic low output may differ from the propagation delay
to a logic high.
Data Sheet
DC CORRECTNESS AND MAGNETIC FIELD IMMUNITY
Positive and negative logic transitions at the isolator input cause
narrow (~1 ns) pulses to be sent to the decoder via the transformer.
The decoder is bistable and is, therefore, either set or reset by
the pulses, indicating input logic transitions. In the absence of
logic transitions at the input for more than 1 μs, a periodic set
of refresh pulses indicative of the correct input state are sent to
ensure dc correctness at the output. If the decoder receives no
internal pulses of more than about 5 μs, the input side is assumed
to be unpowered or nonfunctional, in which case the isolator
output is forced to a default state (see Table 24) by the watchdog
timer circuit.
The limitation on the magnetic field immunity of the ADuM5200 /
ADuM5201 / ADuM5202 is set by the condition in which induced
voltage in the receiving coil of the transformer is sufficiently
large to either falsely set or reset the decoder. The following analysis
defines the conditions under which this may occur. The 3 V
operating condition of the ADuM5200 / ADuM5201 / ADuM5202
is examined because it represents the most susceptible mode of
operation.
The pulses at the transformer output have an amplitude greater
than 1.0 V. The decoder has a sensing threshold at about 0.5 V, thus
establishing a 0.5 V margin in which induced voltages can be
tolerated. The voltage induced across the receiving coil is given by
V = ( ?dβ/dt )∑π r n2 ; n = 1, 2, … , N
where:
β is the magnetic flux density (gauss).
N is the number of turns in the receiving coil.
r n is the radius of the n th turn in the receiving coil (cm).
Given the geometry of the receiving coil in the ADuM5200 /
ADuM5201 / ADuM5202 and an imposed requirement that the
induced voltage be, at most, 50% of the 0.5 V margin at the
decoder, a maximum allowable magnetic field is calculated as
shown in Figure 25.
100
INPUT (V IX )
50%
OUTPUT (V OX )
t PLH
t PHL
50%
10
1
Figure 24. Propagation Delay Parameters
Pulse width distortion is the maximum difference between
these two propagation delay values and is an indication of
how accurately timing of the input signal is preserved.
Channel-to-channel matching refers to the maximum amount
the propagation delay differs between channels within a single
0.1
0.01
0.001
ADuM5200 / ADuM5201 / ADuM5202 component.
1k
10k 100k 1M 10M
MAGNETIC FIELD FREQUENCY (Hz)
100M
Propagation delay skew refers to the maximum amount the
propagation delay differs between multiple ADuM5200 /
ADuM5201 / ADuM5202 components operating under the
same conditions.
Rev. B | Page 20 of 28
Figure 25. Maximum Allowable External Magnetic Flux Density
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