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参数资料
型号： ADV7180KST48Z
厂商： Analog Devices Inc
文件页数： 114/116页
文件大小： 0K
描述： IC VID DECOD SDTV 10BIT 48LQFP
标准包装： 1
类型： 视频解码器
应用： 数码相机，手机，便携式视频
安装类型： 表面贴装
封装/外壳： 48-LQFP
供应商设备封装： 48-LQFP（7x7）
包装： 托盘
Data Sheet
ADV7180
Rev. I | Page 97 of 116
Main Map
Bit Description
Bits
(Shading Indicates Default State)
Comments
Notes
Subaddress
Register
7
6
5
4
3
2
1
0
0xE4
SD Saturation Cr
SD_SAT_Cr[7:0]; adjusts
the saturation by affecting
gain on the Cr channel
0
Gain on Cr channel = 42 dB
1
0
Gain on Cb channel = 0 dB
1
Gain on Cb channel = +6 dB
0xE5
NTSC V bit
begin
NVBEG[4:0]; number of
lines after lCOUNT rollover
to set V high
0
1
0
1
NTSC default (ITU-R BT.656)
NVBEGSIGN
0
Set to low when manual programming
1
Not suitable for user programming
NVBEGDELE; delay V bit
going high by one line
relative to NVBEG (even
field)
0
No delay
1
Additional delay by one line
NVBEGDELO; delay V bit
going high by one line
relative to NVBEG (odd
field)
0
No delay
1
Additional delay by one line
0xE6
NTSC V bit end
NVEND[4:0]; number of
lines after lCOUNT rollover
to set V low
0
1
0
NTSC default (ITU-R BT.656)
NVENDSIGN
0
Set to low when manual programming
1
Not suitable for user programming
NVENDDELE; delay V bit
going low by one line
relative to NVEND (even
field)
0
No delay
1
Additional delay by one line
NVENDDELO; delay V bit
going low by one line
relative to NVEND (odd
field)
0
No delay
1
Additional delay by one line
0xE7
NTSC F bit
toggle
NFTOG[4:0]; number of
lines after lCOUNT rollover to
toggle F signal
0
1
NTSC default
NFTOGSIGN
0
Set to low when manual programming
1
Not suitable for user programming
NFTOGDELE; delay
F transition by one line
relative to NFTOG (even
field)
0
No delay
1
Additional delay by one line
NFTOGDELO; delay
F transition by one line
relative to NFTOG
(odd field)
0
No delay
1
Additional delay by one line
0xE8
PAL V bit begin
PVBEG[4:0]; number of
lines after lCOUNT rollover
to set V high
0
1
0
1
PAL default (ITU-R BT.656)
PVBEGSIGN
0
Set to low when manual programming
1
Not suitable for user programming
PVBEGDELE; delay V bit
going high by one line
relative to PVBEG (even
field)
0
No delay
1
Additional delay by one line
PVBEGDELO; delay V bit
going high by one line
relative to PVBEG (odd
field)
0
No delay
1
Additional delay by one line
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相关代理商/技术参数
参数描述
ADV7180KST48Z-RL 功能描述:视频 IC 48-Lead Low Profile Quad Flat Package RoHS:否 制造商:Fairchild Semiconductor 工作电源电压:5 V 电源电流:80 mA 最大工作温度:+ 85 C 封装 / 箱体:TSSOP-28 封装:Reel
ADV7180WBCP32Z 制造商:Analog Devices 功能描述:IC, 10-BIT 4X OVERSAMPLING SDTV DECODER 制造商:Analog Devices 功能描述:SDTV VIDEO DECODER 32-PIN LFCSP EP TRAY - Trays
ADV7180WBCP32Z-RL 制造商:Analog Devices 功能描述:10-BIT, 4? OVERSAMPLING SDTV VIDEO DECODER - Tape and Reel
ADV7180WBCPZ 功能描述:IC VIDEO DECODER SDTV 40LFCSP RoHS:是 类别:集成电路 (IC) >> 线性 - 视频处理 系列:- 产品变化通告:Product Discontinuation 07/Mar/2011 标准包装:3,000 系列:OMNITUNE™ 类型:调谐器 应用:移动电话，手机，视频显示器 安装类型:表面贴装 封装/外壳:65-WFBGA 供应商设备封装:PG-WFSGA-65 包装:带卷 (TR) 其它名称:SP000365064
ADV7180WBCPZ-REEL 功能描述:IC VIDEO DECODER SDTV 40LFCSP RoHS:是 类别:集成电路 (IC) >> 线性 - 视频处理 系列:- 产品变化通告:Product Discontinuation 07/Mar/2011 标准包装:3,000 系列:OMNITUNE™ 类型:调谐器 应用:移动电话，手机，视频显示器 安装类型:表面贴装 封装/外壳:65-WFBGA 供应商设备封装:PG-WFSGA-65 包装:带卷 (TR) 其它名称:SP000365064
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