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| 型号： | ADZS-BFAV-EZEXT |
| 厂商： | Analog Devices Inc |
| 文件页数： | 28/60页 |
| 文件大小： | 0K |
| 描述： | BOARD DAUGHT ADSP-BF533,37,61KIT |
| 产品培训模块： | Interfacing AV Converters to Blackfin Processors |
| 标准包装： | 1 |
| 附件类型： | DSP |
| 适用于相关产品： | ADSP-BF533，ADSP-BF537，ADSP-BF538，ADSP-BF561 EZLITE Kits |
| 相关产品： | ADSP-BF537KBCZ-6BV-ND - IC DSP CTLR 16BIT 208CSPBGA ADSP-BF537BBCZ-5BV-ND - IC DSP CTLR 16BIT 208CSPBGA ADSP-BF537KBCZ-6AV-ND - IC DSP CTLR 16BIT 182CSPBGA ADSP-BF537BBCZ-5AV-ND - IC DSP CTLR 16BIT 182CSPBGA ADSP-BF561SKBCZ-6V-ND - IC DSP 32BIT 600MHZ 256CSPBGA ADSP-BF561SKBCZ-5V-ND - IC DSP 32BIT 500MHZ 256CSPBGA ADSP-BF533SBBC400-ND - IC PROCESSOR 400MHZ 160-CSPBGA ADSP-BF533SBBCZ400-ND - IC PROCESSOR DL 400MHZ 160CSPBGA ADSP-BF561SKBCZ-5A-ND - IC DSP CTLR 32BIT BKFN 256CSPBGA ADSP-BF533SKBC-6V-ND - IC DSP CTLR DUAL 160CSPBGA 更多... |
| 其它名称： | ADDS-BFAV-EZEXT ADDS-BFAV-EZEXT-ND |
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System Architecture
Table 2-1. Signals of Expansion Interface Connectors
Net/Bus Name
(Direction)
PPI0_D[0:15]
A-V EZ-Extender Function
Connects the processor’s PPI0 data pins to the
Relevant
Configuration
Jumpers
JP5.3/4 ,
(Bi)
VID_IN_D[0:15]
or the VID_OUT_D[0:15] buses,
JP9.2/4/6
depending on the jumper settings. This allows PPI0 to
interface with all of the possible video interfaces on the
board. This bus can be bidirectional; the direction can be
fixed with a jumper or controlled by a flag pin.
PPI0_CLK
(Output)
PPI0_SYNC1
(Bi)
PPI0_SYNC2
(Bi)
PPI1_D[0:15]
The clock related to the data on PPI0 . This can come
from an onboard oscillator, from one of the video inter-
faces, or from a socket that allows a user-supplied oscilla-
tor.
The frame sync signal going to the processor’s
PPI0_SYNC1 pin. The signal behaves as the HSYNC or
HREF for the video interfaces. The signal also can be used
to drive the FPDI HS signal. The signal can be bidirec-
tional, where the direction is fixed with a jumper or is
controlled by a flag pin.
The frame sync signal going to the processor’s
PPI0_SYNC2 pin. The signal behaves as the VSYNC or
VREF for the video interfaces. The signal also can be used
to drive the FPDI VS signal. This signal can be bidirec-
tional; the direction can be fixed with a jumper or is con-
trolled by a flag pin.
Connects the processors PPI1 data pins to the
JP4.1/2 ,
JP4.3/4 ,
JP4.5/6 ,
JP4.7/8
JP6.1/3/5 ,
JP8.1/3/5 ,
JP8.7/8
JP6.2/4/6 ,
JP8.2/4/6 ,
JP8.7/8
JP5.3/4 ,
(Bi)
VID_OUT_D[0:15]
bus. The VID_OUT_D[0:15] bus
JP5.5/6 ,
interfaces with the output video interfaces (FPDI and the
video encoder). The bus can be bidirectional but
intended to be an input. Changing the direction is neces-
sary only for test purposes and allows PPI0 to loop-back
to PPI1 . D2 , D3 and D10 of the bus have other function-
ality (follows).
JP3.9/10 ,
JP3.3/5/7
JP3.4/6/8
PPI1_D10
(Bi)
Multifunction net that typically functions as the D10 pin
of PPI1 but, with a jumper, also can connect to the PDWN
input of the OmniVision and the Kodak camera inter-
faces.
JP3.9/10 ,
JP5.3/4 ,
JP5.5/6
2-4
Blackfin A-V EZ-Extender Manual
相关PDF资料 |
PDF描述 |
|---|---|
| ADZS-BFSHUSB-EZEXT | BOARD DAUGHTER EZ EXTENDER |
| ADZS-BRKOUT-EX3 | ADZS-BRKOUT-EX3 |
| ADZS-SHAUDIO-EZEXT | SHARC AUDIO EZ-EXTENDER |
| ADZS-WVGALCD-EX3 | BOARD EXTENDER WVGA/LCD EI3 |
| AGA-3 | FUSE 3A 125VAC 1AG FAST |
相关代理商/技术参数 |
参数描述 |
|---|---|
| ADZS-BFBLUET-EZEXT | 功能描述:EZ-EXTENDER DAUGHTERBOARD RoHS:是 类别:RF/IF 和 RFID >> RF 评估和开发套件，板 系列:SHARC® 标准包装:1 系列:- 类型:GPS 接收器 频率:1575MHz 适用于相关产品:- 已供物品:模块 其它名称:SER3796 |
| ADZS-BFBLUET-EZEXT | 制造商:Analog Devices 功能描述:Blackfin Bluetooth EZ-Extender |
| ADZS-BF-EZEXT-1 | 功能描述:BOARD DAUGHTER ADSP-BF533/561KIT RoHS:是 类别:编程器，开发系统 >> 配件 系列:- 标准包装:1 系列:- 附件类型:适配器板 适用于相关产品:RCB230，RCB231，RCB212 配用:26790D-ND - RCB BREAKOUT BOARD RS232 CABLE |
| ADZS-BFFPGA-EZEXT | 功能描述:BOARD EVAL FPGA BLACKFIN EXTENDR RoHS:是 类别:编程器，开发系统 >> 配件 系列:- 标准包装:1 系列:- 附件类型:适配器板 适用于相关产品:RCB230，RCB231，RCB212 配用:26790D-ND - RCB BREAKOUT BOARD RS232 CABLE |
| ADZS-BFFPGA-EZEXT | 制造商:Analog Devices 功能描述:; Kit Contents:Daughter Board; For Use W |
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