参数资料
型号: AGLE600V5-FG484I
厂商: Microsemi SoC
文件页数: 68/166页
文件大小: 0K
描述: IC FPGA 1KB FLASH 600K 484-FBGA
标准包装: 60
系列: IGLOOe
逻辑元件/单元数: 13824
RAM 位总计: 110592
输入/输出数: 270
门数: 600000
电源电压: 1.425 V ~ 1.575 V
安装类型: 表面贴装
工作温度: -40°C ~ 85°C
封装/外壳: 484-BGA
供应商设备封装: 484-FPBGA(23x23)
IGLOOe DC and Switching Characteristics
2-2
Revision 13
Table 2-2
Recommended Operating Conditions 1
Symbol
Parameter
Commercial
Industrial
Units
TA
Ambient Temperature
0 to +70
–40 to +85
°C
TJ
Junction Temperature2
0 to + 85
–40 to +100
°C
VCC 3
1.5 V DC core supply voltage4
1.425 to 1.575 1.425 to 1.575
V
1.2 V–1.5 V wide range DC
core voltage5, 6
1.14 to 1.575
V
VJTAG
JTAG DC voltage
1.4 to 3.6
V
VPUMP
Programming voltage6
Programming Mode
3.15 to 3.45
V
Operation7
0 to 3.6
V
VCCPLL8 Analog power supply (PLL)
1.5 V DC core supply voltage4 1.425 to 1.575 1.425 to 1.575
V
1.2 V–1.5 V DC core supply
voltage5
1.14 to 1.575
V
VCCI and
VMV9
1.2 V DC supply voltage5
1.14 to 1.26
V
1.2 V wide range DC supply
voltage5
1.14 to 1.575
V
1.5 V DC supply voltage
1.425 to 1.575 1.425 to 1.575
V
1.8 V DC supply voltage
1.7 to 1.9
V
2.5 V DC supply voltage
2.3 to 2.7
V
3.0 V DC supply voltage10
2.7 to 3.6
V
3.3 V DC supply voltage
3.0 to 3.6
V
LVDS differential I/O
2.375 to 2.625 2.375 to 2.625
V
LVPECL differential I/O
3.0 to 3.6
V
Notes:
1. All parameters representing voltages are measured with respect to GND unless otherwise specified.
2. To ensure targeted reliability standards are met across ambient and junction operating temperatures, Microsemi
recommends that the user follow best design practices using Microsemi’s timing and power simulation tools.
3. The ranges given here are for power supplies only. The recommended input voltage ranges specific to each I/O
standard are given in Table 2-21 on page 2-20. VCCI should be at the same voltage within a given I/O bank.
4. For IGLOOe V5 devices
5. For IGLOOe V2 devices only, operating at VCCI
VCC
6. All IGLOOe devices (V5 and V2) must be programmed with the VCC core voltage at 1.5 V. Applications using the V2
devices powered by a 1.2 V supply must switch the core supply to 1.5 V for in-system programming.
7. VPUMP can be left floating during operation (not programming mode).
8. VCCPLL pins should be tied to VCC pins. See the "VCCPLA/B/C/D/E/F PLL Supply Voltage" section for further
information.
9. VMV pins must be connected to the corresponding VCCI pins. See the "VMVx I/O Supply Voltage (quiet)" section for
further information.
10. 3.3 V wide range is compliant to the JESD8-B specification and supports 3.0 V VCCI operation.
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