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参数资料
型号： AGLE600V5-FGG256C
元件分类： FPGA
英文描述： FPGA, 13824 CLBS, 600000 GATES, PBGA256
封装： 17 X 17 MM, 1.60 MM HEIGHT, 1 MM PITCH, ROHS COMPLIANT, FBGA-256
文件页数： 75/156页
文件大小： 5023K
代理商： AGLE600V5-FGG256C
IGLOOe DC and Switching Characteristics
Ad vance v0.3
2-11
Power Consumption of Various Internal Resources
Table 2-14 Different Components Contributing to the Dynamic Power Consumption in IGLOOe Devices
For IGLOOe V2 or V5 Devices, 1.5 V DC Core Supply Voltage
Parameter
Definition
Device-Specific Dynamic
Contributions (W/MHz)
AGLE600
AGLE3000
PAC1
Clock contribution of a Global Rib
19.7
12.77
PAC2
Clock contribution of a Global Spine
4.16
1.85
PAC3
Clock contribution of a VersaTile row
0.88
PAC4
Clock contribution of a VersaTile used as a sequential module
0.11
PAC5
First contribution of a VersaTile used as a sequential module
0.057
PAC6
Second contribution of a VersaTile used as a sequential module
0.207
PAC7
Contribution of a VersaTile used as a combinatorial module
0.207
PAC8
Average contribution of a routing net
0.7
PAC9
Contribution of an I/O input pin (standard-dependent)
See Table 2-12 on page 2-9.
PAC10
Contribution of an I/O output pin (standard-dependent)
See Table 2-13 on page 2-10.
PAC11
Average contribution of a RAM block during a read operation
25.00
PAC12
Average contribution of a RAM block during a write operation
30.00
PAC13
Dynamic contribution for PLL
2.70
* For a different output load, drive strength, or slew rate, Actel recommends using the Actel power calculator or
SmartPower in Actel Libero Integrated Design Environment (IDE) software.
Table 2-15 Different Components Contributing to the Static Power Consumption in IGLOO Devices
For IGLOOe V2 or V5 Devices, 1.5 V DC Core Supply Voltage
Parameter
Definition
Device Specific Static Power (mW)
AGLE600
AGLE3000
PDC1
Array static power in Active mode
See Table 2-11 on page 2-8.
PDC2
Array static power in Static (Idle) mode
See Table 2-10 on page 2-7.
PDC3
Array static power in Flash*Freeze mode
See Table 2-8 on page 2-7.
PDC4
Static PLL contribution
1.84
PDC5
Bank quiescent power (VCCI-dependent)
See Table 2-11 on page 2-8.
PDC6
I/O input pin static power (standard-dependent)
See Table 2-12 on page 2-9.
PDC7
I/O output pin static power (standard-dependent)
See Table 2-13 on page 2-10.
相关PDF资料
PDF描述
AGLE600V5-FGG484C FPGA, 13824 CLBS, 600000 GATES, PBGA484
ACBQ20TTEB270K/390M RC NETWORK, BUSSED, 1W, 27ohm, 20V, 0.000039uF, SURFACE MOUNT, 20
ACBQ20TTEB270K/401M RC NETWORK, BUSSED, 1W, 27ohm, 20V, 0.0004uF, SURFACE MOUNT, 20
ACBQ20TTEB270K/430M RC NETWORK, BUSSED, 1W, 27ohm, 20V, 0.000043uF, SURFACE MOUNT, 20
ACBQ20TTEB270K/470M RC NETWORK, BUSSED, 1W, 27ohm, 20V, 0.000047uF, SURFACE MOUNT, 20
相关代理商/技术参数
参数描述
AGLE600V5-FGG256I 功能描述:IC FPGA 1KB FLASH 600K 256-FBGA RoHS:是 类别:集成电路 (IC) >> 嵌入式 - FPGA（现场可编程门阵列） 系列:IGLOOe 产品培训模块:Three Reasons to Use FPGA's in Industrial Designs Cyclone IV FPGA Family Overview 特色产品:Cyclone? IV FPGAs 标准包装:60 系列:CYCLONE® IV GX LAB/CLB数:9360 逻辑元件/单元数:149760 RAM 位总计:6635520 输入/输出数:270 门数:- 电源电压:1.16 V ~ 1.24 V 安装类型:表面贴装 工作温度:0°C ~ 85°C 封装/外壳:484-BGA 供应商设备封装:484-FBGA（23x23）
AGLE600V5-FGG484 功能描述:IC FPGA 1KB FLASH 600K 484-FBGA RoHS:是 类别:集成电路 (IC) >> 嵌入式 - FPGA（现场可编程门阵列） 系列:IGLOOe 标准包装:40 系列:SX-A LAB/CLB数:6036 逻辑元件/单元数:- RAM 位总计:- 输入/输出数:360 门数:108000 电源电压:2.25 V ~ 5.25 V 安装类型:表面贴装 工作温度:0°C ~ 70°C 封装/外壳:484-BGA 供应商设备封装:484-FPBGA（27X27）
AGLE600V5-FGG484I 功能描述:IC FPGA 1KB FLASH 600K 484-FBGA RoHS:是 类别:集成电路 (IC) >> 嵌入式 - FPGA（现场可编程门阵列） 系列:IGLOOe 产品培训模块:Three Reasons to Use FPGA's in Industrial Designs Cyclone IV FPGA Family Overview 特色产品:Cyclone? IV FPGAs 标准包装:60 系列:CYCLONE® IV GX LAB/CLB数:9360 逻辑元件/单元数:149760 RAM 位总计:6635520 输入/输出数:270 门数:- 电源电压:1.16 V ~ 1.24 V 安装类型:表面贴装 工作温度:0°C ~ 85°C 封装/外壳:484-BGA 供应商设备封装:484-FBGA（23x23）
AGLE600V5-FGG896 制造商:ACTEL 制造商全称:Actel Corporation 功能描述:IGLOOe Low-Power Flash FPGAs with Flash Freeze Technology
AGLE600V5-FGG896ES 制造商:ACTEL 制造商全称:Actel Corporation 功能描述:IGLOOe Low-Power Flash FPGAs with Flash Freeze Technology
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