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参数资料
型号： AGLP060V2-CSG289I
厂商： Microsemi SoC
文件页数： 79/134页
文件大小： 0K
描述： IC FPGA IGLOO PLUS 60K 289-CSP
标准包装： 152
系列： IGLOO PLUS
逻辑元件/单元数： 1584
RAM 位总计： 18432
输入/输出数： 157
门数： 60000
电源电压： 1.14 V ~ 1.575 V
安装类型： 表面贴装
工作温度： -40°C ~ 85°C
封装/外壳： 289-TFBGA，CSBGA
供应商设备封装： 289-CSP（14x14）
IGLOO PLUS Low Power Flash FPGAs
Revision 16
2-35
Timing Characteristics
Applies to 1.5 V DC Core Voltage
Applies to 1.2 V DC Core Voltage
Table 2-54 1.8 V LVCMOS Low Slew – Applies to 1.5 V DC Core Voltage
Commercial-Case Conditions: TJ = 70°C, Worst-Case VCC = 1.425 V, Worst-Case VCCI = 1.7 V
Drive Strength
Speed Grade
tDOUT
tDP
tDIN
tPY
tPYS
tEOUT
tZL
tZH
tLZ
tHZ
Units
2 mA
STD
0.97
5.89 0.18 1.00
1.43
0.66
6.01 5.43 1.78 1.30
ns
4 mA
STD
0.97
4.82 0.18 1.00
1.43
0.66
4.92 4.56 2.08 2.08
ns
6 mA
STD
0.97
4.13 0.18 1.00
1.43
0.66
4.21 3.96 2.30 2.46
ns
8 mA
STD
0.97
4.13 0.18 1.00
1.43
0.66
4.21 3.96 2.30 2.46
ns
Note: For specific junction temperature and voltage supply levels, refer to Table 2-6 on page 2-6 for derating values.
Table 2-55 1.8 V LVCMOS High Slew – Applies to 1.5 V DC Core Voltage
Commercial-Case Conditions: TJ = 70°C, Worst-Case VCC = 1.425 V, Worst-Case VCCI = 1.7 V
Drive Strength
Speed Grade
tDOUT
tDP
tDIN
tPY
tPYS
tEOUT
tZL
tZH
tLZ
tHZ
Units
2 mA
STD
0.97
2.82 0.18 1.00
1.43
0.66
2.88 2.78 1.78 1.35
ns
4 mA
STD
0.97
2.30 0.18 1.00
1.43
0.66
2.35 2.11 2.08 2.15
ns
6 mA
STD
0.97
2.00 0.18 1.00
1.43
0.66
2.04 1.76 2.29 2.55
ns
8 mA
STD
0.97
2.00 0.18 1.00
1.43
0.66
2.04 1.76 2.29 2.55
ns
Notes:
1. For specific junction temperature and voltage supply levels, refer to Table 2-6 on page 2-6 for derating values.
2. Software default selection highlighted in gray.
Table 2-56 1.8 V LVCMOS Low Slew – Applies to 1.2 V DC Core Voltage
Commercial-Case Conditions: TJ = 70°C, Worst-Case VCC = 1.14 V, Worst-Case VCCI = 1.7 V
Drive Strength
Speed Grade
tDOUT
tDP
tDIN
tPY
tPYS
tEOUT
tZL
tZH
tLZ
tHZ
Units
2 mA
STD
0.98
6.43 0.19 1.12
1.61
0.67
6.54 5.93 2.19 1.88
ns
4 mA
STD
0.98
5.33 0.19 1.12
1.61
0.67
5.41 5.03 2.50 2.68
ns
6 mA
STD
0.98
4.61 0.19 1.12
1.61
0.67
4.69 4.41 2.72 3.07
ns
8 mA
STD
0.98
4.61 0.19 1.12
1.61
0.67
4.69 4.41 2.72 3.07
ns
Note: For specific junction temperature and voltage supply levels, refer to Table 2-6 on page 2-6 for derating values.
Table 2-57 1.8 V LVCMOS High Slew – Applies to 1.2 V DC Core Voltage
Commercial-Case Conditions: TJ = 70°C, Worst-Case VCC = 1.14 V, Worst-Case VCCI = 1.7 V
Drive Strength
Speed Grade
tDOUT
tDP
tDIN
tPY
tPYS
tEOUT
tZL
tZH
tLZ
tHZ
Units
2 mA
STD
0.98
3.30 0.19 1.12
1.61
0.67
3.34 3.21 2.19 1.93
ns
4 mA
STD
0.98
2.76 0.19 1.12
1.61
0.67
2.79 2.51 2.50 2.76
ns
6 mA
STD
0.98
2.45 0.19 1.12
1.61
0.67
2.48 2.16 2.71 3.16
ns
8 mA
STD
0.98
2.45 0.19 1.12
1.61
0.67
2.48 2.16 2.71 3.16
ns
Notes:
1. For specific junction temperature and voltage supply levels, refer to Table 2-6 on page 2-6 for derating values.
2. Software default selection highlighted in gray.
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