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参数资料
型号： AGLP060V5VQG176I
元件分类： FPGA
英文描述： FPGA, 1584 CLBS, 60000 GATES, PQFP176
封装： 20 X 20 MM, 1 MM HEIGHT, 0.4 MM PITCH, VQFP-176
文件页数： 29/128页
文件大小： 4383K
代理商： AGLP060V5VQG176I
Datasheet Information
4- 4
R ev isio n 1 1
Revision 4 (Jul 2008)
Product Brief v1.1
DC and Switching
Characteristics
Advance v0.3
As a result of the Libero IDE v8.4 release, Actel now offers a wide range of core
voltage support. The document was updated to change 1.2 V / 1.5 V to 1.2 V to
1.5 V.
N/A
Revision 3 (Jun 2008)
DC and Switching
Characteristics
Advance v0.2
Tables have been updated to reflect default values in the software. The default
I/O capacitance is 5 pF. Tables have been updated to include the LVCMOS 1.2 V
I/O set.
N/A
Table note 3 was updated in Table 2-2 Recommended Operating Conditions1,2
to add the sentence, "VCCI should be at the same voltage within a given I/O
bank." References to table notes 5, 6, 7, and 8 were added. Reference to table
note 3 was removed from VPUMP Operation and placed next to VCC.
2-2
Table 2-4 Overshoot and Undershoot Limits 1 was revised to remove "as
measured on quiet I/Os" from the title. Table note 2 was revised to remove
"estimated SSO density over cycles." Table note 3 was deleted.
2-3
The table note for Table 2-9 Quiescent Supply Current (IDD) Characteristics,
IGLOO PLUS Flash*Freeze Mode* to remove the sentence stating that values do
not include I/O static contribution.
2-7
The table note for Table 2-10 Quiescent Supply Current (IDD) Characteristics,
IGLOO PLUS Sleep Mode* was updated to remove VJTAG and VCCI and the
statement that values do not include I/O static contribution.
2-7
The table note for Table 2-11 Quiescent Supply Current (IDD) Characteristics,
IGLOO PLUS Shutdown Mode was updated to remove the statement that values
do not include I/O static contribution.
2-8
Note 2 of Table 2-12 Quiescent Supply Current (IDD), No IGLOO PLUS
Flash*Freeze Mode 1 was updated to include VCCPLL. Table note 4 was deleted.
2-8
Table 2-13 Summary of I/O Input Buffer Power (per pin) – Default I/O Software
Settings and Table 2-14 Summary of I/O Output Buffer Power (per pin) – Default
I/O Software Settings1 were updated to remove static power. The table notes
were updated to reflect that power was measured on VCCI. Table note 2 was
added to Table 2-13 Summary of I/O Input Buffer Power (per pin) – Default I/O
Software Settings.
2-9, 2-9
Table 2-16 Different Components Contributing to the Static Power Consumption
in IGLOO PLUS Devices and Table 2-18 Different Components Contributing to
the Static Power Consumption in IGLOO PLUS Devices were updated to change
the definition for PDC5 from bank static power to bank quiescent power. Table
subtitles were added for Table 2-16 Different Components Contributing to the
Static Power Consumption in IGLOO PLUS Devices, Table 2-17 Different
Components Contributing to Dynamic Power Consumption in IGLOO PLUS
Devices, and Table 2-18 Different Components Contributing to the Static Power
Consumption in IGLOO PLUS Devices.
2-11,
2-12
The "Total Static Power Consumption—PSTAT" section was revised.
2-12
Table 2-32 Schmitt Trigger Input Hysteresis is new.
2-26
Packaging v1.3
The "281-Pin CSP" package drawing is new.
3-13
The "281-Pin CSP" table for the AGLP125 device is new.
3-13
Revision
Changes
Page
相关PDF资料
PDF描述
AGLP060V5VQG176 FPGA, 1584 CLBS, 60000 GATES, PQFP176
AGN200A03X POWER/SIGNAL RELAY, DPDT, MOMENTARY, 0.047A (COIL), 3VDC (COIL), 140mW (COIL), 1A (CONTACT), 110VDC (CONTACT), SURFACE MOUNT-STRAIGHT
AGN200A06X POWER/SIGNAL RELAY, DPDT, MOMENTARY, 0.023A (COIL), 6VDC (COIL), 140mW (COIL), 1A (CONTACT), 110VDC (CONTACT), SURFACE MOUNT-STRAIGHT
AGN200A09X POWER/SIGNAL RELAY, DPDT, MOMENTARY, 0.016A (COIL), 9VDC (COIL), 140mW (COIL), 1A (CONTACT), 110VDC (CONTACT), SURFACE MOUNT-STRAIGHT
AGN200A12X POWER/SIGNAL RELAY, DPDT, MOMENTARY, 0.012A (COIL), 12VDC (COIL), 140mW (COIL), 1A (CONTACT), 110VDC (CONTACT), SURFACE MOUNT-STRAIGHT
相关代理商/技术参数
参数描述
AGLP060V5-VQG176I 功能描述:IC FPGA IGLOO PLUS 60K 176-VQFN RoHS:是 类别:集成电路 (IC) >> 嵌入式 - FPGA（现场可编程门阵列） 系列:IGLOO PLUS 标准包装:152 系列:IGLOO PLUS LAB/CLB数:- 逻辑元件/单元数:792 RAM 位总计:- 输入/输出数:120 门数:30000 电源电压:1.14 V ~ 1.575 V 安装类型:表面贴装 工作温度:-40°C ~ 85°C 封装/外壳:289-TFBGA，CSBGA 供应商设备封装:289-CSP（14x14）
AGLP060-V5VQG289 制造商:ACTEL 制造商全称:Actel Corporation 功能描述:IGLOO PLUS Low-Power Flash FPGAs with FlashFreeze Technology
AGLP060-V5VQG289ES 制造商:ACTEL 制造商全称:Actel Corporation 功能描述:IGLOO PLUS Low-Power Flash FPGAs with FlashFreeze Technology
AGLP060-V5VQG289I 制造商:ACTEL 制造商全称:Actel Corporation 功能描述:IGLOO PLUS Low-Power Flash FPGAs with FlashFreeze Technology
AGLP060-V5VQG289PP 制造商:ACTEL 制造商全称:Actel Corporation 功能描述:IGLOO PLUS Low-Power Flash FPGAs with FlashFreeze Technology
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