参数资料
型号: AGLP125V5-CSG289I
厂商: Microsemi SoC
文件页数: 72/134页
文件大小: 0K
描述: IC FPGA IGLOO PLUS 125K 289-CSP
标准包装: 152
系列: IGLOO PLUS
逻辑元件/单元数: 3120
RAM 位总计: 36864
输入/输出数: 212
门数: 125000
电源电压: 1.425 V ~ 1.575 V
安装类型: 表面贴装
工作温度: -40°C ~ 85°C
封装/外壳: 289-TFBGA,CSBGA
供应商设备封装: 289-CSP(14x14)
IGLOO PLUS DC and Switching Characteristics
2-28
Revision 16
Timing Characteristics
Applies to 1.5 V DC Core Voltage
Applies to 1.2 V DC Core Voltage
Table 2-36 3.3 V LVTTL / 3.3 V LVCMOS Low Slew – Applies to 1.5 V DC Core Voltage
Commercial-Case Conditions: TJ = 70°C, Worst-Case VCC = 1.425 V, Worst-Case VCCI = 3.0 V
Drive Strength
Speed Grade
tDOUT
tDP
tDIN
tPY
tPYS
tEOUT
tZL
tZH
tLZ
tHZ
Units
4 mA
STD
0.97
3.94 0.18 0.85
1.15
0.66
4.02 3.46 1.82 1.87
ns
6 mA
STD
0.97
3.20 0.18 0.85
1.15
0.66
3.27 2.94 2.04 2.27
ns
8 mA
STD
0.97
3.20 0.18 0.85
1.15
0.66
3.27 2.94 2.04 2.27
ns
12 mA
STD
0.97
2.72 0.18 0.85
1.15
0.66
2.78 2.57 2.20 2.53
ns
16 mA
STD
0.97
2.72 0.18 0.85
1.15
0.66
2.78 2.57 2.20 2.53
ns
Note: For specific junction temperature and voltage supply levels, refer to Table 2-6 on page 2-6 for derating values.
Table 2-37 3.3 V LVTTL / 3.3 V LVCMOS High Slew – Applies to 1.5 V DC Core Voltage
Commercial-Case Conditions: TJ = 70°C, Worst-Case VCC = 1.425 V, Worst-Case VCCI = 3.0 V
Drive Strength
Speed Grade
tDOUT
tDP
tDIN
tPY
tPYS
tEOUT
tZL
tZH
tLZ
tHZ
Units
4 mA
STD
0.97
2.36 0.18 0.85
1.15
0.66
2.41 1.90 1.82 1.98
ns
6 mA
STD
0.97
1.96 0.18 0.85
1.15
0.66
2.01 1.56 2.04 2.38
ns
8 mA
STD
0.97
1.96 0.18 0.85
1.15
0.66
2.01 1.56 2.04 2.38
ns
12 mA
STD
0.97
1.76 0.18 0.85
1.15
0.66
1.80 1.39 2.20 2.64
ns
16 mA
STD
0.97
1.76 0.18 0.85
1.15
0.66
1.80 1.39 2.20 2.64
ns
Notes:
1. For specific junction temperature and voltage supply levels, refer to Table 2-6 on page 2-6 for derating values.
2. Software default selection highlighted in gray.
Table 2-38 3.3 V LVTTL / 3.3 V LVCMOS Low Slew – Applies to 1.2 V DC Core Voltage
Commercial-Case Conditions: TJ = 70°C, Worst-Case VCC = 1.14 V, Worst-Case VCCI = 3.0 V
Drive Strength
Speed Grade
tDOUT
tDP
tDIN
tPY
tPYS
tEOUT
tZL
tZH
tLZ
tHZ
Units
4 mA
STD
0.98
4.56 0.19 0.99
1.37
0.67
4.63 3.98 2.26 2.57
ns
6 mA
STD
0.98
3.80 0.19 0.99
1.37
0.67
3.96 3.45 2.49 2.98
ns
8 mA
STD
0.98
3.80 0.19 0.99
137
0.67
3.86 3.45 2.49 2.98
ns
12 mA
STD
0.98
3.31 0.19 0.99
1.37
0.67
3.36 3.07 2.65 3.25
ns
16 mA
STD
0.98
3.31 0.19 0.99
1.37
0.67
3.36 3.07 2.65 3.25
ns
Note: For specific junction temperature and voltage supply levels, refer to Table 2-6 on page 2-6 for derating values.
Table 2-39 3.3 V LVTTL / 3.3 V LVCMOS High Slew – Applies to 1.2 V DC Core Voltage
Commercial-Case Conditions: TJ = 70°C, Worst-Case VCC = 1.14 V, Worst-Case VCCI = 3.0 V
Drive Strength
Speed Grade
tDOUT
tDP
tDIN
tPY
tPYS
tEOUT
tZL
tZH
tLZ
tHZ
Units
4 mA
STD
0.98
2.92 0.19 0.99
1.37
0.67
2.97 2.38 2.25 2.70
ns
6 mA
STD
0.98
2.52 0.19 0.99
1.37
0.67
2.56 2.03 2.49 3.11
ns
8 mA
STD
0.98
2.52 0.19 0.99
1.37
0.67
2.56 2.03 2.49 3.11
ns
12 mA
STD
0.98
2.31 0.19 0.99
1.37
0.67
2.34 1.86 2.65 3.38
ns
16 mA
STD
0.98
2.31 0.19 0.99
1.37
0.67
2.34 1.86 2.65 3.38
ns
Notes:
1. For specific junction temperature and voltage supply levels, refer to Table 2-6 on page 2-6 for derating values.
2. Software default selection highlighted in gray
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