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参数资料
| 型号： | AK4380VT |
| 元件分类： | DAC |
| 英文描述： | SERIAL INPUT LOADING, 24-BIT DAC, PDSO16 |
| 封装： | 6.40 X 5 MM, 0.65 MM PITCH, PLASTIC, TSSOP-16 |
| 文件页数： | 7/21页 |
| 文件大小： | 226K |
| 代理商： | AK4380VT |
ASAHI KASEI
[AK4380]
MS0018-E-01
2000/8
- 15 -
n Reset Function
When RSTN = “0”, the AK4380’s digital section is powered down but the internal register values are not initialized. The
analog outputs go to VCOM voltage and DZF pin goes to “H”. Figure 7 shows the example of reset by RSTN bit.
Internal
State
RSTN bit
Digital Block Power-down
Normal Operation
GD
“0” data
D/A Out
(Analog)
D/A In
(Digital)
Clock In
MCLK,LRCK,BICK
(1)
(3)
DZF
(3)
(1)
(2)
Normal Operation
2/fs(5)
Internal
RSTN bit
2~3/fs (6)
3~4/fs (6)
Don’t care
(4)
Notes:
(1) The analog output corresponding to the digital input has a group delay, GD.
(2) Analog outputs go to VCOM voltage.
(3) Click noise occurs at the edges(“
↑ ↓”) of the internal timing of RSTN bit. This noise is output even if “0” data is
input.
(4) The external clocks (MCLK, BICK and LRCK) can be stopped in the reset mode (RSTN = “L”).
(5) DZF pin goes to “H” when the RSTN bit becomes to “0”, and goes to “L” at 2/fs after RSTN bit becomes to “1”.
(6) There is a delay, 3~4/fs from RSTN bit "0" to the internal RSTN bit “0”, and 2~3/fs from RSTN bit “1” to the
internal RSTN “1”.
Figure 7. Reset sequence example
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