参数资料
型号: AL4CX263
厂商: AverLogic Technologies, Inc.
英文描述: 16K/32K/64K/128K x9, 8K/16K/32K/64K x18 Synchronous FIFO
中文描述: 16K/32K/64K/128K X9热卖,8K/16K/32K/64K x18同步FIFO
文件页数: 2/2页
文件大小: 47K
代理商: AL4CX263
A
VER
L
OGIC
T
ECHNOLOGIES
,
I
NC
.
TEL
:
1
408
361-0400
e-mail: sales@averlogic.com
URL: www.averlogic.com
11/6/2002
(
8 k , 1 6 k , 3 2 k , 6 4 k )
x 1 8 / ( 1 6 k , 3 2 k ,
6 4 k , 1 2 8 k ) x 9
M e m o r y A r r a y
I n p u t
B u f f e r
O u t p u t
B u f f e r
W rite C o n t r o l
L o g ic
R e a d C o n t r o l
L o g ic
F la g L o g ic
E x p a n s io n L o g ic
W rite P o in te r
R e a d P o in te r
O f f s e t R e g i s s e r s
R e s e t L o g ic
I n p u t d a t a b u s
O u t p u t d a t a b u s
/O E
W C L K
/W E N
/ L D
/R S T
R C L K
/R E N
/ F F
/E F
/H F
/P A F
/P A E
/R X O
/W X I
/R X I
A L 4 C X 2 x 3 F I F O B lo c k D ia g r a m
AL4CX2x3 FIFO memory is AverLogic
Technologies, latest products that is designed
to buffer high-speed data for a wide range of
application such as optical storage controllers,
Networking
Switches
communication applications.
The embedded memory array with built-in
address decoder, pointer manager and state-
of-the-art circuits provide an easy-to-use
interface to serial read/write memory and offer
a flexible way to manage memory in the
system design.
The input port of the FIFO is controlled by a
free running clock (WCLK), and an input
enable (/WEN). The output port is controlled
by another clock (RCLK) and an output
enable (/REN). Data is read into or output
from FIFO synchronous on every individual
WRCK or RCLK clock cycle when /WEN or
/REN is asserted respectively.
These FIFOs support selectable bus width up
to 18bit for both input and output ports and
can be configured as x18 to x18, x18 to x9, x9
to x18 and x9 to x9 multiple input and output
port bus width. This allows for easy
and
various
conversion of the bus width between the input
flow and output flow.
There are two fixed flags, Empty Flag/Output
Ready and Full Flag/Input Ready, and two
programmable
flags,
Almost-Full. The flags enable further
manipulation of the synchronous control.
Multiple AL4CX2x3s can be cascaded to
expand the storage depth or can be used in
parallel to expand bus width. The FIFOs are
3.3-volt devices with 5-volt input tolerance.
And are available in the 80-pin thin quad flat
Pack (TQFP Package).
D
ISTRIBUTED BY
:
Almost-Empty
and
相关PDF资料
PDF描述
AL4CX273 16K/32K/64K/128K x9, 8K/16K/32K/64K x18 Synchronous FIFO
AL4CX283 16K/32K/64K/128K x9, 8K/16K/32K/64K x18 Synchronous FIFO
AL4CX293 16K/32K/64K/128K x9, 8K/16K/32K/64K x18 Synchronous FIFO
AL4CX3650 2K/ 4K/ 8K/ 16K/ 32K x 36 Synchronous FIFOs
AL4CX3660 2K/ 4K/ 8K/ 16K/ 32K x 36 Synchronous FIFOs
相关代理商/技术参数
参数描述
AL4CX273 制造商:AVERLOGIC 制造商全称:AVERLOGIC 功能描述:16K/32K/64K/128K x9, 8K/16K/32K/64K x18 Synchronous FIFO
AL4CX283 制造商:AVERLOGIC 制造商全称:AVERLOGIC 功能描述:16K/32K/64K/128K x9, 8K/16K/32K/64K x18 Synchronous FIFO
AL4CX293 制造商:AVERLOGIC 制造商全称:AVERLOGIC 功能描述:16K/32K/64K/128K x9, 8K/16K/32K/64K x18 Synchronous FIFO
AL4CX3650 制造商:AVERLOGIC 制造商全称:AVERLOGIC 功能描述:2K/ 4K/ 8K/ 16K/ 32K x 36 Synchronous FIFOs
AL4CX3660 制造商:AVERLOGIC 制造商全称:AVERLOGIC 功能描述:2K/ 4K/ 8K/ 16K/ 32K x 36 Synchronous FIFOs