参数资料
型号: AM29DL320GB70WMI
厂商: SPANSION LLC
元件分类: DRAM
英文描述: High Speed CMOS Logic Dual 4-Input NAND Gates 14-CDIP -55 to 125
中文描述: 2M X 16 FLASH 3V PROM, 70 ns, PBGA48
封装: 6 X 12 MM, 0.80 MM PITCH, FBGA-48
文件页数: 18/58页
文件大小: 1239K
代理商: AM29DL320GB70WMI
16
Am29DL320G
September 27, 2004
Autoselect Mode
The autoselect mode provides manufacturer and de-
vice identification, and sector protection verification,
through identifier codes output on DQ7–DQ0. This
mode is primarily intended for programming equip-
ment to automatically match a device to be pro-
grammed with its corresponding programming
algorithm. However, the autoselect codes can also be
accessed in-system through the command register.
When using programming equipment, the autoselect
mode requires V
ID
(8.5 V to 12.5 V) on address pin A9.
Address pins A6, A1, and A0 must be as shown in
Table 6
. In addition, when verifying sector protection,
the sector address must appear on the appropriate
highest order address bits (see
Table 2
).
Table 6
shows the remaining address bits that are don’t care.
When all necessary bits have been set as required,
the programming equipment may then read the corre-
sponding identifier code on DQ7–DQ0.
To access the autoselect codes in-system, the host
system can issue the autoselect command via the
command register, as shown in
Table 13
. This method
does not require V
ID
. Refer to the Autoselect Com-
mand Sequence section for more information.
Table 6.
Autoselect Codes, (High Voltage Method)
Legend:
T = Top Boot Block, B = Bottom Boot Block, L = Logic Low = V
IL
, H = Logic High = V
IH
, BA = Bank Address, SA = Sector Address, X =
Don’t care.
Notes:
1.
The bank address bits are A20–A18.
2.
The device ID must be read across three cycles.
Description
CE# OE# WE#
A20
to
A12
A11
to
A10
A9
A8
to
A7
A6
A5
to
A4
A3
A2
A1
A0
DQ15 to DQ8
DQ7
to
DQ0
BYTE#
= V
IH
BYTE#
= V
IL
Manufacturer ID
:
AMD
L
L
H
BA
X
V
ID
X
L
X
X
X
L
L
X
X
01h
D
Read Cycle 1
L
L
H
BA
X
V
ID
X
L
X
L
L
L
H
22h
X
7Eh
Read Cycle 2
L
L
H
BA
X
V
ID
X
L
X
H
H
H
L
22h
X
0Ah
Read Cycle 3
L
L
H
BA
X
V
ID
X
L
X
H
H
H
H
22h
X
01h (T), 00h (B)
Sector Protection
Verification
L
L
H
SA
X
V
ID
X
L
X
X
X
H
L
X
X
01h (protected),
00h (unprotected)
SecSi
Indicator
Bit (DQ7)
L
L
H
BA
X
V
ID
X
L
X
X
X
H
H
X
X
82h (factory locked),
02h (not factory
locked)
相关PDF资料
PDF描述
AM29DL320GT70PCIN High Speed CMOS Logic 3-to-8 Line Decoder Demultiplexer Inverting and Non-Inverting 16-CDIP -55 to 125
AM29DL320GB90 For new designs involving TSOP packages, S29JL032H supercedes Am29DL320G and is the factory-recommended migration path.
AM29DL320GT70WMI For new designs involving TSOP packages, S29JL032H supercedes Am29DL320G and is the factory-recommended migration path.
AM29DL320GT90 For new designs involving TSOP packages, S29JL032H supercedes Am29DL320G and is the factory-recommended migration path.
AM29DL320G For new designs involving TSOP packages, S29JL032H supercedes Am29DL320G and is the factory-recommended migration path.
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