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参数资料
| 型号： | AM29DL320GT120EIN |
| 厂商： | ADVANCED MICRO DEVICES INC |
| 元件分类： | PROM |
| 英文描述： | 32 Megabit (4 M x 8-Bit/2 M x 16-Bit) CMOS 3.0 Volt-only, Simultaneous Operation Flash Memory |
| 中文描述： | 2M X 16 FLASH 3V PROM, 120 ns, PDSO48 |
| 封装： | TSOP-48 |
| 文件页数： | 3/55页 |
| 文件大小： | 1230K |
| 代理商： | AM29DL320GT120EIN |
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July 31, 2002
Am29DL320G
11
ADV ANC E
INFO RMAT ION
dress access timings provide new data when ad-
dresses are changed. While in sleep mode, output
data is latched and always available to the system.
CC5 in the DC Characteristics table represents the
automatic sleep mode current specification.
RESET#: Hardware Reset Pin
The RESET# pin provides a hardware method of re-
setting the device to reading array data. When the RE-
SET# pin is driven low for at least a period of t
RP, the
device immediately terminates any operation in
progress, tristates all output pins, and ignores all
read/write commands for the duration of the RESET#
pulse. The device also resets the internal state ma-
chine to reading array data. The operation that was in-
terrupted should be reinitiated once the device is
ready to accept another command sequence, to en-
sure data integrity.
Current is reduced for the duration of the RESET#
pulse. When RESET# is held at V
SS±0.3 V, the device
draws CMOS standby current (I
CC4). If RESET# is held
at V
IL but not within VSS±0.3 V, the standby current will
be greater.
The RESET# pin may be tied to the system reset cir-
cuitry. A system reset would thus also reset the Flash
memory, enabling the system to read the boot-up firm-
ware from the Flash memory.
If RESET# is asserted during a program or erase op-
eration, the RY/BY# pin remains a “0” (busy) until the
internal reset operation is complete, which requires a
time of t
READY (during Embedded Algorithms). The
system can thus monitor RY/BY# to determine
whether the reset operation is complete. If RESET# is
asserted when a program or erase operation is not ex-
ecuting (RY/BY# pin is “1”), the reset operation is com-
pleted within a time of t
READY (not during Embedded
Algorithms). The system can read data t
RH after the
RESET# pin returns to V
IH.
ICC4 in the DC Characteristics table represents the
reset current. Also refer to AC Characteristics tables
for RESET# timing parameters and to Figure 14 for
the timing diagram.
Output Disable Mode
When the OE# input is at V
IH, output from the device is
disabled. The output pins are placed in the high
impedance state.
相关PDF资料 |
PDF描述 |
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| AM29DL320GT120WDI | 32 Megabit (4 M x 8-Bit/2 M x 16-Bit) CMOS 3.0 Volt-only, Simultaneous Operation Flash Memory |
| AM29DL320GT120WDIN | 32 Megabit (4 M x 8-Bit/2 M x 16-Bit) CMOS 3.0 Volt-only, Simultaneous Operation Flash Memory |
| AM29DL320GT120WMI | 32 Megabit (4 M x 8-Bit/2 M x 16-Bit) CMOS 3.0 Volt-only, Simultaneous Operation Flash Memory |
| AM29DL320GT120WMIN | 32 Megabit (4 M x 8-Bit/2 M x 16-Bit) CMOS 3.0 Volt-only, Simultaneous Operation Flash Memory |
| AM29F002NB-70PI | 2 Megabit (256 K x 8-Bit) CMOS 5.0 Volt-only Boot Sector Flash Memory |
相关代理商/技术参数 |
参数描述 |
|---|---|
| AM29DL322DB7REIT | 制造商:AMD 功能描述:New |
| AM29DL322DB-90WDIT | 制造商:Spansion 功能描述:FLASH PARALLEL 3V/3.3V 32MBIT 4MX8/2MX16 90NS 63FBGA - Tape and Reel |
| AM29DL322DT-90EI-T | 制造商:Advanced Micro Devices 功能描述: |
| AM29DL322GB-90EI | 制造商:Advanced Micro Devices 功能描述:2M X 16 FLASH 3V PROM, 90 ns, 48 Pin Plastic SMT |
| AM29DL322GT-90EI | 制造商:Advanced Micro Devices 功能描述:Flash Mem Parallel 3.3V 32M-Bit 4M x 8/2M x 16 90ns 48-Pin TSOP |
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