- 您现在的位置：买卖IC网 > PDF目录366431 > AM29F200AB-70FI (ADVANCED MICRO DEVICES INC) 2 Megabit (256 K x 8-Bit/128 K x 16-Bit) CMOS 5.0 Volt-only, Boot Sector Flash Memory PDF资料下载
参数资料
| 型号： | AM29F200AB-70FI |
| 厂商： | ADVANCED MICRO DEVICES INC |
| 元件分类： | PROM |
| 英文描述： | 2 Megabit (256 K x 8-Bit/128 K x 16-Bit) CMOS 5.0 Volt-only, Boot Sector Flash Memory |
| 中文描述： | 128K X 16 FLASH 5V PROM, 70 ns, PDSO48 |
| 封装： | REVERSE, TSOP-48 |
| 文件页数： | 8/39页 |
| 文件大小： | 237K |
| 代理商： | AM29F200AB-70FI |
第1页第2页第3页第4页第5页第6页第7页当前第8页第9页第10页第11页第12页第13页第14页第15页第16页第17页第18页第19页第20页第21页第22页第23页第24页第25页第26页第27页第28页第29页第30页第31页第32页第33页第34页第35页第36页第37页第38页第39页
8
Am29F200A
P R E L I M I N A R Y
DEVICE BUS OPERATIONS
This section describes the requirements and use of the
device bus operations, which are initiated through the
internal command register. The command register itself
does not occupy any addressable memory location.
The register is composed of latches that store the com-
mands, along with the address and data information
needed to execute the command. The contents of the
register serve as inputs to the internal state machine.
The state machine outputs dictate the function of the
device. The appropriate device bus operations table
lists the inputs and control levels required, and the re-
sulting output. The following subsections describe
each of these operations in further detail.
Table 1.
Am29F200A Device Bus Operations
Legend:
L = Logic Low = V
IL
, H = Logic High = V
IH
, V
ID
= 12.0
±
0.5 V, X = Don’t Care, D
IN
= Data In, D
OUT
= Data Out, A
IN
= Address In
Note:
See the sections on Sector Protection and Temporary Sector Unprotect for more information.
Word/Byte Configuration
The BYTE# pin controls whether the device data I/O
pins DQ15–DQ0 operate in the byte or word configura-
tion. If the BYTE# pin is set at logic ‘1’, the device is in
word configuration, DQ15–DQ0 are active and con-
trolled by CE# and OE#.
If the BYTE# pin is set at logic ‘0’, the device is in byte
configuration, and only data I/O pins DQ0–DQ7 are ac-
tive and controlled by CE# and OE#. The data I/O pins
DQ8–DQ14 are tri-stated, and the DQ15 pin is used as
an input for the LSB (A-1) address function.
Requirements for Reading Array Data
To read array data from the outputs, the system must
drive the CE# and OE# pins to V
IL
. CE# is the power
control and selects the device. OE# is the output control
and gates array data to the output pins. WE# should re-
main at V
IH
. On x16 (word-wide) devices, the BYTE# pin
determines whether the device outputs array data in
words or bytes.
The internal state machine is set for reading array
data upon device power-up, or after a hardware re-
set. This ensures that no spurious alteration of the
memory content occurs during the power transition.
No command is necessary in this mode to obtain
array data. Standard microprocessor read cycles that
assert valid addresses on the device address inputs
produce valid data on the device data outputs. The
device remains enabled for read access until the
command register contents are altered.
See “Reading Array Data” for more information. Refer
to the AC Read Operations table for timing specifica-
tions and to the Read Operations Timings diagram for
the timing waveforms. I
CC1
in the DC Characteristics
table represents the active current specification for
reading array data.
Writing Commands/Command Sequences
To write a command or command sequence (which in-
cludes programming data to the device and erasing
sectors of memory), the system must drive WE# and
CE# to V
IL
, and OE# to V
IH
.
On x16 (word-wide) devices, for program operations,
the BYTE# pin determines whether the device ac-
cepts program data in bytes or words. Refer to
“Word/Byte Configuration” for more information.
Operation
CE#
OE#
WE#
RESET#
A0–A16
DQ0–DQ7
DQ8–DQ15
BYTE#
= V
IH
BYTE#
= V
IL
Read
L
L
H
H
A
IN
D
OUT
D
OUT
High-Z
Write
L
H
L
H
A
IN
D
IN
D
IN
High-Z
CMOS Standby
V
CC
± 0.5 V
X
X
V
CC
± 0.5 V
X
High-Z
High-Z
High-Z
TTL Standby
H
X
X
H
X
High-Z
High-Z
High-Z
Output Disable
L
H
H
H
X
High-Z
High-Z
High-Z
Hardware Reset
X
X
X
L
X
High-Z
High-Z
High-Z
Temporary Sector Unprotect
(See Note)
X
X
X
V
ID
A
IN
D
IN
D
IN
X
相关PDF资料 |
PDF描述 |
|---|---|
| Am29F200AB-70FIB | 2 Megabit (256 K x 8-Bit/128 K x 16-Bit) CMOS 5.0 Volt-only, Boot Sector Flash Memory |
| AM29F200AB-70SC | 2 Megabit (256 K x 8-Bit/128 K x 16-Bit) CMOS 5.0 Volt-only, Boot Sector Flash Memory |
| Am29F200AB-70SCB | 2 Megabit (256 K x 8-Bit/128 K x 16-Bit) CMOS 5.0 Volt-only, Boot Sector Flash Memory |
| AM29F200AB-70SE | 2 Megabit (256 K x 8-Bit/128 K x 16-Bit) CMOS 5.0 Volt-only, Boot Sector Flash Memory |
| Am29F200AB-70SEB | 2 Megabit (256 K x 8-Bit/128 K x 16-Bit) CMOS 5.0 Volt-only, Boot Sector Flash Memory |
相关代理商/技术参数 |
参数描述 |
|---|---|
| AM29F200AB-90SC | 制造商:Advanced Micro Devices 功能描述:NOR Flash, 128K x 16, 44 Pin, Plastic, SOP |
| AM29F200AB90SI | 制造商:AMD 功能描述:NEW |
| AM29F200AT-120EC | 制造商:Advanced Micro Devices 功能描述:NOR Flash Parallel 5V 2Mbit 256K/128K x 8bit/16bit 120ns 48-Pin TSOP |
| AM29F200AT55EC | 制造商:Advanced Micro Devices 功能描述: |
| AM29F200AT70SI | 制造商:AMD 功能描述:* |
发布紧急采购，3分钟左右您将得到回复。