参数资料
型号: AM29LV065DU50WHI
厂商: Advanced Micro Devices, Inc.
英文描述: 64 Megabit (8 M x 8-Bit) CMOS 3.0 Volt-only Uniform Sector Flash Memory with VersatileIOTM Control
中文描述: 64兆位(8米× 8位)的CMOS 3.0伏特,只有统一部门闪光控制记忆与VersatileIOTM
文件页数: 26/54页
文件大小: 613K
代理商: AM29LV065DU50WHI
26
Am29LV065D
February 16, 2006
vice to normal operation.
Table 10
shows the address
and data requirements for both command sequences.
See also
“SecSi (Secured Silicon) Sector Flash
Memory Region”
for further information.
Byte Program Command Sequence
Programming is a four-bus-cycle operation. The pro-
gram command sequence is initiated by writing two
unlock write cycles, followed by the program set-up
command. The program address and data are written
next, which in turn initiate the Embedded Program al-
gorithm. The system is
not
required to provide further
controls or timings. The device automatically provides
internally generated program pulses and verifies the
programmed cell margin.
Table 10
shows the address
and data requirements for the byte program command
sequence.
When the Embedded Program algorithm is complete,
the device then returns to the read mode and ad-
dresses are no longer latched. The system can deter-
mine the status of the program operation by using
DQ7, DQ6, or RY/BY#. Refer to the Write Operation
Status section for information on these status bits.
Any commands written to the device during the Em-
bedded Program Algorithm are ignored.
The SecSi
sector, autoselect, and CFI functions are not available
when a program function is in progress. Note that a
hardware reset
immediately terminates the program
operation. The program command sequence should
be reinitiated once the device has returned to the read
mode, to ensure data integrity.
Programming is allowed in any sequence and across
sector boundaries.
A bit cannot be programmed
from “0” back to a “1.”
Attempting to do so may
cause the device to set DQ5 = 1, or cause the DQ7
and DQ6 status bits to indicate the operation was suc-
cessful. However, a succeeding read will show that the
data is still “0.” Only erase operations can convert a “0”
to a “1.”
Unlock Bypass Command Sequence
The unlock bypass feature allows the system to pro-
gram bytes to the device faster than using the stan-
dard program command sequence. The unlock bypass
command sequence is initiated by first writing two un-
lock cycles. This is followed by a third write cycle con-
taining the unlock bypass command, 20h. The device
then enters the unlock bypass mode. A two-cycle un-
lock bypass program command sequence is all that is
required to program in this mode. The first cycle in this
sequence contains the unlock bypass program com-
mand, A0h; the second cycle contains the program
address and data. Additional data is programmed in
the same manner. This mode dispenses with the initial
two unlock cycles required in the standard program
command sequence, resulting in faster total program-
ming time.
Table 10
shows the requirements for the
command sequence.
During the unlock bypass mode, only the Unlock By-
pass Program and Unlock Bypass Reset commands
are valid. To exit the unlock bypass mode, the system
must issue the two-cycle unlock bypass reset com-
mand sequence. The first cycle must contain the data
90h. The second cycle must contain the data 00h. The
device then returns to the read mode.
The device offers accelerated program operations
through the ACC pin. When the system asserts V
HH
on
the ACC pin, the device automatically enters the Un-
lock Bypass mode. The system may then write the
two-cycle Unlock Bypass program command se-
quence. The device uses the higher voltage on the
ACC pin to accelerate the operation.
Note that the
ACC pin must not be at V
HH
for operations other than
accelerated programming, or device damage may re-
sult.
Figure 4
illustrates the algorithm for the program oper-
ation. Refer to the Erase and Program Operations
table in the AC Characteristics section for parameters,
and
Figure 16
for timing diagrams.
Figure 4.
Program Operation
START
Write Program
Command Sequence
Data Poll
from System
Verify Data
No
Yes
Last Address
No
Yes
Programming
Completed
Increment Address
Embedded
Program
algorithm
in progress
Note:
See
Table 10
for program command sequence.
相关PDF资料
PDF描述
AM29LV065DU121REE 64 Megabit (8 M x 8-Bit) CMOS 3.0 Volt-only Uniform Sector Flash Memory with VersatileIOTM Control
AM29LV065DU121REEN 64 Megabit (8 M x 8-Bit) CMOS 3.0 Volt-only Uniform Sector Flash Memory with VersatileIOTM Control
AM29LV065DU121REI 64 Megabit (8 M x 8-Bit) CMOS 3.0 Volt-only Uniform Sector Flash Memory with VersatileIOTM Control
AM29LV065DU121REIN 64 Megabit (8 M x 8-Bit) CMOS 3.0 Volt-only Uniform Sector Flash Memory with VersatileIOTM Control
AM29LV065DU121RFE 64 Megabit (8 M x 8-Bit) CMOS 3.0 Volt-only Uniform Sector Flash Memory with VersatileIOTM Control
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