参数资料
型号: AM29LV640MT110REI
厂商: ADVANCED MICRO DEVICES INC
元件分类: PROM
英文描述: 64 Megabit (4 M x 16-Bit/8 M x 8-Bit) MirrorBit⑩ 3.0 Volt-only Boot Sector Flash Memory
中文描述: 4M X 16 FLASH 3V PROM, 110 ns, PDSO48
封装: MO-142B, TSOP-48
文件页数: 13/66页
文件大小: 836K
代理商: AM29LV640MT110REI
February1,2007 26190C8
Am29LV640MT/B
11
D A T A S H E E T
DEVICE BUS OPERATIONS
This section describes the requirements and use of
the device bus operations, which are initiated through
the internal command register. The command register
itself does not occupy any addressable memory loca-
tion. The register is a latch used to store the com-
mands, along with the address and data information
needed to execute the command. The contents of the
register serve as inputs to the internal state machine.
The state machine outputs dictate the function of the
device.
Table 1
lists the device bus operations, the in-
puts and control levels they require, and the resulting
output. The following subsections describe each of
these operations in further detail.
Table 1.
Device Bus Operations
Legend:
L = Logic Low = V
IL
, H = Logic High = V
IH
, V
ID
= 11.5–12.5
V, V
HH
= 11.5–12.5
V, X = Don’t Care, SA = Sector Address,
A
IN
= Address In, D
IN
= Data In, D
OUT
= Data Out
Notes:
1. Addresses are A21:A0 in word mode; A21:A-1 in byte mode. Sector addresses are A21:A12 in both modes.
2. The sector protect and sector unprotect functions can also be implemented via programming equipment. See the See
Sector
Group Protection and Unprotection on page 20
.
3. If WP# = V
IL
, the first or last sector remains protected. If WP# = V
IH
, the top two or bottom two sectors are protected or unprotected
as determined by the method described in
Sector Group Protection and Unprotection
. All sectors are unprotected when shipped
from the factory (The Secured Silicon Sector can be factory protected depending on version ordered.)
4. D
IN
or D
OUT
as required by command sequence, data polling, or sector protect algorithm (see
Figure 2
).
Word/Byte Configuration
The BYTE# pin controls whether the device data I/O
pins operate in the byte or word configuration. If the
BYTE# pin is set at logic ‘1’, the device is in word con-
figuration, DQ0–DQ15 are active and controlled by
CE# and OE#.
If the BYTE# pin is set at logic ‘0’, the device is in byte
configuration, and only data I/O pins DQ0–DQ7 are
active and controlled by CE# and OE#. The data I/O
pins DQ8–DQ14 are tri-stated, and the DQ15 pin is
used as an input for the LSB (A-1) address function.
Requirements for Reading Array Data
To read array data from the outputs, the system must
drive the CE# and OE# pins to V
IL
. CE# is the power
control and selects the device. OE# is the output con-
trol and gates array data to the output pins. WE#
should remain at V
IH
.
Operation
CE#
OE#
WE#
RESET#
WP#
ACC
Addresses
(Note 2)
DQ0–
DQ7
DQ8–DQ15
BYTE#
= V
IH
BYTE#
= V
IL
Read
L
L
H
H
X
X
A
IN
D
OUT
D
OUT
DQ8–DQ14
= High-Z,
DQ15 = A-1
Write (Program/Erase)
L
H
L
H
(Note 3)
X
A
IN
(Note 4) (Note 4)
Accelerated Program
L
H
L
H
(Note 3)
V
HH
A
IN
(Note 4) (Note 4)
Standby
V
CC
±
0.3 V
X
X
V
CC
±
0.3 V
X
H
X
High-Z
High-Z
High-Z
Output Disable
L
H
H
H
X
X
X
High-Z
High-Z
High-Z
Reset
X
X
X
L
X
X
X
High-Z
High-Z
High-Z
Sector Group Protect
(Note 2)
L
H
L
V
ID
H
X
SA, A6 =L,
A3=L, A2=L,
A1=H, A0=L
(Note 4)
X
X
Sector Group Unprotect
(Note 2)
L
H
L
V
ID
H
X
SA, A6=H,
A3=L, A2=L,
A1=H, A0=L
(Note 4)
X
X
Temporary Sector Group
Unprotect
X
X
X
V
ID
H
X
A
IN
(Note 4) (Note 4)
High-Z
相关PDF资料
PDF描述
AM29LV640MT110RPCF 64 Megabit (4 M x 16-Bit/8 M x 8-Bit) MirrorBit⑩ 3.0 Volt-only Boot Sector Flash Memory
AM29LV640MT110RPCI 64 Megabit (4 M x 16-Bit/8 M x 8-Bit) MirrorBit⑩ 3.0 Volt-only Boot Sector Flash Memory
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