参数资料
型号: AME7107CPL
厂商: AME, Inc.
英文描述: 3-1/2 Digit A/D Converter High Accuracy, Low Power
中文描述: 3-1/2位A / D转换高精度,低功耗
文件页数: 12/20页
文件大小: 1425K
代理商: AME7107CPL
AME, Inc.
Note: fosc = 48 KHz
AME7106/AME7106A/AME7106R
AME7107/AME7107A/AME7107R
3-1/2 Digit A/D Converter
High Accuracy, Low Power
F u ll s c a le
C a z
R in t
C in t
V re f
2 0 0 .0 m V
0 .4 7
μ
F
4 7 K
0 .2 2
μ
F
1 0 0 .0 m V
2 .0 0 0 V
0 .0 4 7
μ
F
4 7 0 K
0 .2 2
μ
F
1 .0 0 0 V
Oscillator Components
R-C Oscillator
A 100 K
Rosc is recommended for all frequencies.
Cosc is selected by using the equation:
fosc = 0.45/(RC)
For fosc of 48KHz, Cosc is 100pF nominally.
To achieve maximum line noise rejection, the signal-
integrate period should be a multiple of line period. The
optimum oscillator frequencies for 60 Hz and 50 Hz
rejection are listed as follows:
For 60 Hz rejection:
40KHz, 48KHz, 60KHz etc.
For 50 Hz rejection:
40KHz, 50KHz, 66-2/3KHz etc.
Reference Voltage Selection
A full-scale reading (2000 counts) requires the input
signal be twice the reference voltage.
In some applications a scale factor other than unity may
exist between a transducer output voltage and the re-
quired digital reading. Assume, for example, a pres-
sure transducer output is 600 mV for 2000 Ib/in
2
. Rather
than dividing the input voltage by three the reference
voltage should be set to 300 mV. This permits the trans-
ducer input to be used directly. The integrator resistor
would be 120K
. In some temperature and weighting
system with variable tare, the offset reading can be
generated by connecting the voltage transducer be-
tween INHI and COMMON and the variable offset volt-
age between COMMON and INLO.
Full-Scale Voltage
200.0 mV
2.000 V
Vref
100.0 mV
1.000 V
n
Component Value Selection
Auto-Zero Capacitor (Caz)
The Caz capacitor size has some influence on system
noise. A 0.47
μ
F capacitor is recommended for 200 mV
full-scale applications. A 0.047
μ
F capacitor is recom-
mended for 2.0V full-scale applications. A mylar di-
electric capacitor is adequate.
Reference Capacitor (Cref)
A 0.1
μ
F capacitor is acceptable when “INLO” is tied
to analog common. If a large common-mode voltage
exists and the application requires 200 mV full-scale,
increase Cref to 1.0
μ
F. A mylar dielectric capacitor is
adequate.
Integrating Capacitor (Cint)
Cint should be selected to maximize the integrator out-
put voltage swing without causing output saturation. A
±2V full-scale integrator output swing is recommended
if “ANALOG COMMON” is used as signal reference.
For 3 readings/second (fosc = 48 KHz) a 0.22
μ
F value
is suggested. If a different oscillator frequency is used,
Cint must be changed in inverse proportion to maintain
the nominal 2V integrator swing. An exact expression
for Cint is:
Cint = [(4000)(1/fosc)(Vfs/Rint)] / Vint
where:
fosc= Oscillator clock frequency
Vfs = Full-scale input voltage
Rint = Integrating resistor
Vint = Desired full-scale integrator output swing
Cint must have low dielectric absorption to minimize
rollover error. A polypropylene capacitor is recom-
mended.
Integrating Resistor (Rint)
The input buffer amplifier and integrator both have a
class A output stage with 100
μ
A quiescent current.
The integrator and buffer can supply 20
μ
A drive cur-
rents with negligible linearity errors. Rint is chosen to
keep the output stage in the linear region. For a 200mV
full-scale, it is 47K
; 2.0V full-scale requires 470K
.
Summary of component selection:
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