参数资料
型号: APW7078OI-TRL
厂商: ANPEC ELECTRONICS CORP
元件分类: 稳压器
英文描述: Single PWM Switching Controller
中文描述: SWITCHING CONTROLLER, PDSO8
封装: LEAD FREE, MO-153AA, TSSOP-8
文件页数: 10/16页
文件大小: 400K
代理商: APW7078OI-TRL
C opyright
ANPEC Electronics C orp.
Rev. A.3 - Nov., 2005
APW 7078
www.anpec.com.tw
10
To avoid the thermal noise from feedback resistor,
Resistance R2 smaller than 100k
and 1% variation
is recommended.
Error amplifier
The error amplifier detects the output voltage of the
switching regulator and outputs the PWM control
signal. The voltage gain is fixed, and connecting a
phase compensation resistor and capacitor to the FB
pin (pin 8) provides stable phase compensation for the
system.
PWM comparator
The voltage comparator has one inverting and three
non-inverting inputs. The comparator is a voltage/pulse
width converter that controls the ON time of the output
pulse depending on the input voltage. The output level
is high (H) when the sawtooth wave is lower than the
error amplifier output voltage, soft start setting voltage,
and idle period setting voltage.
Output circuit
The output circuit is a typical push-pull configuration
to drive an external NMOS transistor directly. It can
provide a 200mA source/sink to/from OUT(pin 6).
Soft start and short circuit detection
Soft start operation is set by connecting capacitor Cscp
to the SCP pin (pin 2). Soft start prevents a current
spike on start-up.On completion of soft start operation,
the SCP pin (pin 2) stays low and enters the short
circuit detection wait state.When an output short cir-
cuit occurs, the error amplifier output is fixed at 1.8V
and capacitor Cscp starts charging.
After charging to approximately 0.8 V, the output pin
Function Description ( Cont.)
V
5
×
2
R
3
R
1
V
OUT
+
=
Setting Output Voltage (Cont.)
Under Voltage Lock Out(UVLO)
Transients during powering on or instantaneous
glitches in the supply voltage can cause system dam-
age or failure. The circuit to prevent malfunction at low
input voltage detects a low input voltage by compar-
ing the supply voltage to the internal reference voltage.
On detection, the circuit fixes the output pin to low.
The system recovers when the supply voltage rises
back above the threshold voltage of the malfunction
prevention circuit.
Layout Considerations
Switching Noise Decoupling Capacitor
A 0.1
μ
F ceramic capacitor should be placed close to
the VOUT pin and GND pin of the chip to filter the
switching spikes in the output voltage monitored by
the VOUT pin.
Feedback Network
On APW7078 application, the feedback networks
should be connected directly to a dedicated analog
ground plane and this ground plane must connect to
the GND pin. If no analog ground plane is available
then this ground must tie directly to the GND pin. The
feedback network, resistors R2 and R3, should be kept
close to the FB pin, and away from the inductor, to
minimize copper trace connections that can inject noise
into the system.
Input Capacitor
The input capacitor C
IN
in V
IN
must be placed close to
the IC. This will reduce copper trace resistance which
)
F
μ
Cscp
8
t
SCP
×
=
(pin 5) is set low and the SCP pin stays low. Once the
protection circuit operates, the circuit can be restored
by resetting the power supply. Short circuit detection
time can be calculate as follow:
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