参数资料
型号: APX809-40SAG-7
厂商: Diodes Inc
文件页数: 4/9页
文件大小: 0K
描述: IC MPU RESET CIRC 4.00V SOT23-3
标准包装: 1
类型: 简单复位/加电复位
监视电压数目: 1
输出: 推挽式,图腾柱
复位: 低有效
复位超时: 最小为 140 ms
电压 - 阀值: 4V
工作温度: -40°C ~ 105°C
安装类型: 表面贴装
封装/外壳: TO-236-3,SC-59,SOT-23-3
供应商设备封装: SOT-23-3
包装: 标准包装
产品目录页面: 1138 (CN2011-ZH PDF)
其它名称: APX809-40SAGDIDKR
APX809/810
3-PIN MICROPROCESSOR RESET CIRCUITS
Typical Application Circuit
V CC
C IN
100nF
V CC
APX8XX
RESET
(RESET)
GND
Functional Description
A microprocessor’s (μP’s) reset input starts the μP in a known
state. The APX809/810 assert reset to prevent code-execution
errors during power-up, power-down, or brownout conditions.
They assert a reset signal whenever the V CC supply voltage
declines below a preset threshold, keeping it asserted for at least
V CC
Microprocessor
RESET
INPUT
GND
high-impedance CMOS logic inputs connected to RESET can
drift to undetermined voltages.
This presents no problem in most applications since most μP and
other circuitry is inoperative with V CC below 1V. However, in
240ms after V CC has risen above the reset threshold. The
APX809/810 have a push-pull output stage.
applications where
RESET must be valid down to 0V, adding a
pull down resistor to
RESET
causes any stray leakage
Ensuring a Valid Reset Output
Down to V CC = 0
currents to flow to ground, holding
RESET
low. R1’s value is
RESET
is guaranteed to be a logic low for V CC > 1V. Once V CC
not critical; 100k are large enough not to load
RESET
and
exceeds the reset threshold, an internal timer keeps
RESET
small enough to pull RESET to ground. For the
APX810 if
low for the reset timeout period; after this interval, RESET
goes high. If a brownout condition occurs (V CC dips below the
RESET is required to remain valid for V CC < 1V.
Benefits of Highly Accurate Reset Threshold
RESET
reset threshold), RESET
goes low. Any time
Most μP supervisor ICs has reset threshold voltages between
V CC goes below the reset threshold, the internal timer resets to
zero, and RESET goes low. The internal timer starts after
5% and 10% below the value of nominal supply voltages. This
ensures a reset will not occur within 5% of the nominal supply,
but will occur when the supply is 10% below nominal. When using
V CC returns above the reset threshold, and
low for the reset timeout period.
RESET
remains
ICs rated at only the nominal supply ±5%, this leaves a zone of
uncertainty where the supply is between 5% and 10% low, and
where the reset may or may not be asserted.
When V CC falls below 1V, the APX809
RESET output no
longer sinks current—it becomes an open circuit. Therefore,
APX809/810 Rev. 4
4 of 9
FEBRUARY 2009
? Diodes Incorporated
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