7 - 17
AS1100
Datasheet - Detailed Description
8.5 Decode-Mode Register
In the AS1100 a BCD decoder is included. Every digit can be selected via register 09h to be decoded. The BCD code consists of the numbers 0-
9, E,H, L,P and -. In register 09h a logic high enables the decoder for the appropriate digit. In case that the decoder is bypassed (logic low) the
data Bits D7-D0 correspond to the segment lines of the AS1100. In
Table 7
some possible settings for register 09h are shown. Bit D7, which
corresponds to the decimal point, is not affected by the settings of the decoder. Logic high means that the decimal point is displayed. In
Table 8
the font of the Code B decoder is shown. In
Table 9
the correspondence of the register to the appropriate segments of a 7 segment display is
shown
(see Figure 6)
.
8.6 Intensity Control and Interdigit Blanking
Brightness of the display can be controlled in an analog way by changing the external resistor (R
SET
). The current, which flows between V
DD
and ISET, defines the current that flows through the LEDs. The LED current is 100 times the ISET current. The mnimumvalue of R
SET
should
be 9.53k
Ω
, which corresponds to 40mA segment current. The brightness of the display can also be controlled digitally via register 0Ah. The
brightness can be programmed in 16 steps and is shown in
Table 10
. An internal pulse width modulator controls the intensity of the display.
8.7 Scan-Limit Register
The scan limt register 0Bh selects the number of digits displayed. When all 8 digits are displayed the update frequency is typically 800Hz. If the
number of digits displayed is reduced, the update frequency is reduced as well. The frequency can be calculated using 8fOSC/N, where N is the
number of digits. Since the number of displayed digits influences the brightness, the resistor R
SET
should be adjusted accordingly. The
Table 12
shows the maximumallowed current, when fewer than 4 digits are used. To avoid differences in brightness the scan limt register should not be
used to blank portions of the display (leading zeros).
Table 5. Register Address Map
Register
Address
Hex
Code
D15-D12
D11
D10
D9
D8
No-Op
X
0
0
0
0
0xX0
Digit 0
X
0
0
0
1
0xX1
Digit 1
X
0
0
1
0
0xX2
Digit 2
X
0
0
1
1
0xX3
Digit 3
X
0
1
0
0
0xX4
Digit 4
X
0
1
0
1
0xX5
Digit 5
X
0
1
1
0
0xX6
Digit 6
X
0
1
1
1
0xX7
Digit 7
X
1
0
0
0
0xX8
Decode Mode
X
1
0
0
1
0xX9
Intensity
X
1
0
1
0
0xXA
Scan Limt
X
1
0
1
1
0xXB
Shutdown
X
1
1
0
0
0xXC
Not used
X
1
1
0
1
0xXD
Reset and ext. Clock
X
1
1
1
0
0xXE
Display Test
X
1
1
1
1
0xXF
Table 6. Shutdown Register Format (address (hex) = 0xXC
Mode
Address Code
(Hex)
Register Data
D7
D6
D5
D4
D3
D2
D1
D0
Shutdown Mode
0xXC
X
X
X
X
X
X
X
0
Normal Operation
0xXC
X
X
X
X
X
X
X
1