10 - 15
AS1105
Datasheet - Detailed Description
8.8 Display Test Register
With the display test register 0Fh all LED can be tested. In the test mode all LEDs are switched on at maximumbrightness (duty cycle 31/32). All
programmng of digit and control registers is maintained. The format of the register is given in
Table 13
.
Note:
The AS1105 remains in display-test mode until the display-test register is reconfigured for normal operation.
8.9 No-Op Register (Cascading of AS1105)
The no-operation register 00h is used when AS1105s are cascaded in order to support more than 4 digit displays. The cascading must be done
in a way that all DOUT are connected to DIN of the following AS1105. The LOAD and CLK signals are connected to all devices. For a write
operation for example to the fifth device the command must be followed by four no-operation commands. When the LOAD signal finally goes to
high all shift registers are latched. The first four devices have got no-operation commands and only the fifth device sees the intended command
and updates its register.
8.10 Reset and External Clock Register
This register is addressed via the serial interface. It allows to switch the device to external clock mode (If D0=1 the CLK pin of the serial interface
operates as systemclock input.) and to apply an external reset (D1). This brings all registers (except reg. E) to default state. For standard
operation the register contents should be "00h".
Table 12. MaximumSegment Current for 1-, 2-, or 3-digit Displays
Number of Digits Displayed
Maximum Segment Current (mA)
1
10
2
20
3
30
Table 13. Display-test Register Format (address (hex) = 0xXF)
Mode
Register Data
D7
D6
D5
D4
D3
D2
D1
D0
Normal Operation
X
X
X
X
X
X
X
0
Display Test Mode
X
X
X
X
X
X
X
1
Table 14. Reset and external Clock register (address (hex) = 0xXE)
Mode
Address Code
(hex)
Register Data
D7
D6
D5
D4
D3
D2
D1
D0
Normal Operation, internal clock
0xXE
X
X
X
X
X
X
0
0
Normal Operation, external clock
0xXE
X
X
X
X
X
X
0
1
Reset state, internal clock
0xXE
X
X
X
X
X
X
1
0
Reset state, external clock
0xXE
X
X
X
X
X
X
1
1
Table 15. R
SET
vs. segment current and LED forward voltage
I
SEG
(mA)
V
LED
(V)
1.5
2.0
2.5
3.0
3.5
40
12.2k
Ω
17.8k
Ω
29.8k
Ω
66.7k
Ω
11.8k
Ω
17.1k
Ω
28.0k
Ω
63.7k
Ω
11.0k
Ω
15.8k
Ω
25.9k
Ω
59.3k
Ω
10.6k
Ω
15.0k
Ω
24.5k
Ω
55.4k
Ω
9.69k
Ω
14.0k
Ω
22.6k
Ω
51.2k
Ω
30
20
10