参数资料
型号: AS1106WL-T
厂商: ams
文件页数: 17/22页
文件大小: 0K
描述: IC DRIVER LED 8-DIGIT 24-SOIC
标准包装: 1,000
显示器类型: LED
配置: 7 段 + DP
接口: 串行
数字或字符: 8 位数字
电流 - 电源: 330mA
电源电压: 2.7 V ~ 5.5 V
工作温度: 0°C ~ 70°C
安装类型: 表面贴装
封装/外壳: 24-SOIC(0.295",7.50mm 宽)
供应商设备封装: 24-SOIC
包装: 带卷 (TR)
AS1106, AS1107
Datasheet - A p p l i c a t i o n I n f o r m a t i o n
9.4 8x8 LED Dot Matrix Driver
The application example in Figure 14 shows the AS1106 as an 8x8 LED dot matrix driver.
The LED columns have common cathodes and are connected to the DIG0:7 outputs. The rows are connected to the segment drivers. Each of
the 64 LEDs can be addressed separately. The columns are selected via the digits as listed in Table 7 on page 9.
The Decode Enable Register (see page 10) must be set to ‘00000000’ as described in Table 9 on page 10. Single LEDs in a column can be
addressed as described in Table 12 on page 11, where bit D0 corresponds to segment G and bit D7 corresponds to segment DP.
Note: For a multiple-digit dot matrix, multiple AS1106 devices must be cascaded.
Figure 14. Application Example as LED Dot Matrix Driver
8x8 LED Dot Matrix
8x8 LED Dot Matrix
Diode Arrangement
SEG G
SEG F
SEG E
SEG D
SEG C
SEG B
SEG A
SEG DP
SEG G
SEG F
SEG E
SEG D
SEG C
SEG B
SEG A
SEG DP
SEG A:G
SEG DP
DIG0:7
SEG A:G
SEG DP
DIG0:7
Micro-
Processor
AS1106/
AS1107
DIN
LOAD/CSN
CLK
DOUT
V DD
V BAT
9.53k Ω
AS1106/
AS1107
DIN
LOAD/CSN
CLK
V DD
V BAT
9.53k Ω
GND
GND
I SET
GND
GND
I SET
9.5 Cascading Drivers
The example in Figure 14 drives 2 dot matrix digits using a 4-wire microprocessor interface. All Scan-Limit Registers should be set to the same
value so that one display will not appear brighter than the other.
For example, to display 12 digits, set both Scan-Limit Registers to display 6 digits so that both displays have a 1/6 duty cycle per digit. If 11 digits
are needed, set both Scan-Limit Registers to display 6 digits and leave one digit unconnected. Otherwise, if one driver is set to display 6 digits
and the other to display 5 digits one display will appear brighter because its duty cycle per digit will be 1/5 and the other display’s duty cycle will
be 1/6.
Note: Refer to No-Op Register (0xX0) on page 13 for additional information.
Revision 2.28
16 - 21
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