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AS1110
Datasheet - Application Information
9.3 Constant Current
In LED display applications, the AS1110 provides virtually no current variations fromchannel-to-channel and fromAS1110-to-AS1110. This is
mostly due to 2 factors:
While I
OUT
≥
10mA, the maximumcurrent skew is less than ±3% between channels and less than ±6% between AS1110 devices.
In the saturation region, the characteristic curve of the output stage is flat
(see Figure 5 on page 7)
. Thus, the output current can be kept
constant regardless of the variations of LED forward voltages (V
F
).
9.4 Adjusting Output Current
The AS1110 scales up the reference current (I
REF
) set by external resistor (R
EXT
) to sink a current (I
OUT
) at each output port. As shown in
Figure3 on page7
the output current in the saturation region is extremely flat so that it is possible to define it as target current (I
OUT TARGET
).
I
OUT TARGET
can be calculated by:
V
REXT
= 1.253V
(EQ 1)
(EQ 2)
(EQ 3)
I
REF
= V
REXT
/R
EXT
(if the other end of R
EXT
is connected to ground)
I
OUT TARGET
= I
REF
*15 = (1.253V/R
EXT
)*15
Where:
R
EXT
is the resistance of the external resistor connected to pin REXT.
V
REXT
is the voltage on pin REXT.
The magnitude of current (as a function of R
EXT
) is around 50.52mA at 372
Ω
and 25.26mA at 744
Ω
.
Figure3 on page7
shows the relationship
curve between the I
OUT TARGET
of each channel and the corresponding external resistor (R
EXT
).
9.5 Package Power Dissipation
The maximumallowable package power dissipation (PD) is determned as:
P
D(MAX)
= (T
J
-T
AMB
)/R
TH(J-A)
(EQ 4)
When 16 output channels are turned on simultaneously, the actual package power dissipation is:
P
D(ACT)
= (I
DD
*V
DD
) + (I
OUT
*Duty*V
DS
*16)
(EQ 5)
Therefore, to keep P
D(ACT)
≤
P
D(MAX)
, the maximumallowed output current as a function of duty cycle is:
I
OUT
= {[(T
J
-T
AMB
)/R
TH(J-A)
]-(I
DD
*V
DD
)}/V
DS
/Duty/16
Where:
T
J
= 150oC
(EQ 6)
9.6 Delayed Outputs
The AS1110 has graduated delay circuits between outputs. These delay circuits can be found between OUTN
n
and constant current block.
The fixed delay time is 20 ns (typ) where OUTN0 has no delay, OUTN1 has 20ns delay, OUTN2 has 40ns delay ... OUTN15 has 300ns delay.
This delay prevents large inrush currents, which reduce power supply bypass capacitor requirements when the outputs turn on
(see Figure 11 on
page 10)
9.7 Switching-Noise Reduction
LED drivers are frequently used in switch-mode applications which normally exhibit switching noise due to parasitic inductance on the PCB.
9.8 Load Supply Voltage
Considering the package power dissipation limts (see EQ 4:6), the AS1110 should be operated within the range of
V
DS
= 0.4 to 1.0V.
For example, if V
LED
is higher than 5V, V
DS
may be so high that P
D(ACT)
> P
D(MAX)
where V
DS
= V
LED
- V
F
. In this case, the lowest possible
supply voltage or a voltage reducer (V
DROP
) should be used. The voltage reducer allows
V
DS
= (V
LED
-V
F
) - V
DROP
.
Note:
Resistors or zener diodes can be used as a voltage reducer as shown in
Figure23
.