参数资料
型号: AS1115-BSST
厂商: ams
文件页数: 19/26页
文件大小: 0K
描述: IC DVR LED 64LED/7SEG I2C 24QSOP
产品培训模块: AS1115 Overview
标准包装: 1
显示器类型: LED
配置: 8 x(7 段),64 LED
接口: I²C
数字或字符: 8 位数字
电流 - 电源: 335mA
电源电压: 2.7 V ~ 5.5 V
工作温度: -40°C ~ 85°C
安装类型: 表面贴装
封装/外壳: 24-SSOP(0.154",3.90mm 宽)
供应商设备封装: 24-QSOP
包装: 标准包装
其它名称: AS1115-BSSTDKR
AS1115
Datasheet - D e t a i l e d D e s c r i p t i o n
Feature Register (0x0E)
The Feature Register is used for enabling various features including switching the device into external clock mode, applying an external reset,
selecting code-B or HEX decoding, enabling or disabling blinking, setting the blinking rate, and resetting the blink timing.
Note: At power-up the Feature Register is initialized to 0.
Table 20. Feature Register Summary
D7
blink_
start
D6
sync
D5
blink_
freq_sel
D4
blink_en
D3
NU
D2
decode_sel
D1
reg_res
D0
clk_en
Table 21. Feature Register Bit Descriptions (Address (HEX) = 0xXE)
Addr: 0xXE
Feature Register
Enables and disables various device features.
Bit
Bit Name
Default
Access
Bit Description
External clock active.
D0
clk_en
0 R/W
0 = Internal oscillator is used for system clock.
1 = Pin CLK of the serial interface operates as system clock input.
Resets all control registers except the Feature Register.
0 = Reset Disabled. Normal operation.
D1
reg_res
0 R/W
1 = All control registers are reset to default state (except the Feature Register)
identically after power-up.
Note: The Digit Registers maintain their data.
Selects display decoding for the selected digits ( Table 8 on page 13 ).
D2
decode_sel
0 R/W
0 = Enable Code-B decoding (see Table 9 on page 14 ).
1 = Enable HEX decoding (see Table 10 on page 14 ).
D3
NU
Not used
D4
blink_en
0 R/W
Enables blinking.
0 = Disable blinking. 1 = Enable blinking.
Sets blink with low frequency (with the internal oscillator enabled):
D5
blink_freq_sel
0 R/W
0 = Blink period typically is 1 second (0.5s on, 0.5s off).
1 = Blink period is 2 seconds (1s on, 1s off).
Synchronizes blinking on the rising edge of pin LD/CS. The multiplex and blink timing
D6
sync
0 R/W
counter is cleared on the rising edge of pin LD/CS. By setting this bit in multiple devices,
the blink timing can be synchronized across all the devices.
Start Blinking with display enabled phase. When bit D4 (blink_en) is set, bit D7
D7
blink_start
0 R/W
determines how blinking starts.
0 = Blinking starts with the display turned off.
1 = Blinking starts with the display turned on.
Revision 1.08
18 - 25
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