参数资料
型号: AS1152-T
厂商: AUSTRIAMICROSYSTEMS AG
元件分类: LVDS
英文描述: Quad, LVDS, TX, 500Mbps; Package Type: TSSOP-16
中文描述: 四路LVDS驱动器
封装: TSSOP-16
文件页数: 5/15页
文件大小: 307K
代理商: AS1152-T
www.austriamicrosystems.com
Revision 1.00
5 - 15
AS1152
Data Sheet - Electrical Characteristics
Switching Characteristics
(V
CC
= +3.0 to +3.6V, R
L
= 100
Ω
±1%, f
150MHz, T
A
= -40 to +85°C
Typical values are at V
CC
= +3.3V, T
A
= +25oC, Unless Otherwise Noted.)
1, 2, 3
Notes:
1. Parameters are guaranteed by design and characterization.
2. C
L
includes probe and jig capacitance.
3. Signal generator conditions for dynamic tests: V
OL
= 0, V
OH
= 3V, f = 100MHz, 50% duty cycle, RO = 50
Ω
,
t
R
1ns, t
F
1ns (0 to 100%).
4. t
SKD1
is the magnitude difference of differential propagation delay. t
SKD1
= |t
PHLD
- t
PLHD
|.
5. t
SKD2
is the magnitude difference of t
PHLD
or t
PLHD
of one channel to the t
PHLD
or t
PLHD
of another channel on
the same device.
6. t
SKD3
is the magnitude difference of any differential propagation delays between devices at the same V
CC
and
within 5°C of each other.
7. t
SKD4
is the magnitude difference of any differential propagation delays between devices operating over the
rated supply and temperature ranges.
8. f
MAX
signal generator conditions: V
OL
= 0, V
OH
= 3V, 50% duty cycle, RO = 50
Ω
,
t
R
1ns, t
F
1ns (0 to 100%).
9. Conforms to ANSI TIA/EIA 644 LVDS Standards
150MHz. Maximum operating frequency of 250MHz is pos-
sible using an AS1150 receiver.
Table 4. Switching Characteristics
Parameter
Symbol
Conditions
Min
Typ
Max
Unit
Differential Propagation Delay,
High-to-Low
t
PHLD
Figure 18 on page 11 and
Figure 19 on page 11
1.1
1.7
ns
Differential Propagation Delay,
Low-to-High
t
PLHD
Figure 18 on page 11 and
Figure 19 on page 11
1.1
1.7
ns
Differential Pulse Skew
4
t
SKD1
Figure 18 on page 11 and
Figure 19 on page 11
0.04
0.35
ns
Differential Channel-to-Channel Skew
5
t
SKD2
Figure 18 on page 11 and
Figure 19 on page 11
0.07
0.60
ns
Differential Part-to-Part Skew
6
t
SKD3
Figure 18 on page 11 and
Figure 19 on page 11
0.13
0.8
ns
Differential Part-to-Part Skew
7
t
SKD4
Figure 18 on page 11 and
Figure 19 on page 11
0.43
1.0
ns
Rise Time
t
TLH
Figure 18 on page 11 and
Figure 19 on page 11
0.2
0.39
2.6
ns
Fall Time
t
THL
Figure 18 on page 11 and
Figure 19 on page 11
0.2
0.39
2.6
ns
Disable Time, High-to-Z
t
PHZ
Figure 21 on page 12 and
Figure 22 on page 12
3
4
ns
Disable Time, Low-to-Z
t
PLZ
Figure 21 on page 12 and
Figure 22 on page 12
3
4
ns
Enable Time, Z-to-High
t
PZH
Figure 21 on page 12 and
Figure 22 on page 12
2
3
ns
Enable Time, Z-to-Low
t
PZL
Figure 21 on page 12 and
Figure 22 on page 12
2
3
ns
Maximum Operating Frequency
8, 9
f
MAX
250
MHz
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