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参数资料
| 型号： | AS1343A-BTDT-10 |
| 厂商： | AUSTRIAMICROSYSTEMS AG |
| 元件分类： | DC/DC变换器 |
| 英文描述： | 42V, 1MHz, Single Cell, Boost; Package Type: TDFN(3x3)-10; Temperature Range: -40 - +85 °C; Dimension: 3 x 3 mm; Shutdown: Yes; Output Current: 140mA; Output Range: 5.5 to 42V; Supply Voltage: 0,90-3,60 |
| 封装： | TDFN(3x3)-10 |
| 文件页数： | 9/17页 |
| 文件大小： | 1074K |
| 代理商： | AS1343A-BTDT-10 |
www.austriamicrosystems.com
Revision 1.04
9 - 17
AS1343
Datasheet - Detailed Description
8 Detailed Description
The AS1343 features a current limiting circuitry, a fixed-frequency PWM architecture, power-OK circuitry, thermal pro-
tection, and an automatic powersave mode in a tiny package, and maintains high efficiency at light loads.
Figure 27. AS1343 - Block Diagram with Shutdown Disconnect Switch
Automatic powersave mode regulates the output and also reduces average current flow into the device, resulting in
high efficiency at light loads. When the output increases sufficiently, the powersave comparator output remains high,
resulting in continuous operation.
For each oscillator cycle, the power switch is enabled. A voltage proportional to switch current is added to a stabilizing
ramp and the resulting sum is delivered to the positive terminal of the PWM comparator.
The error amplifier compares the voltage at FB with the internal 1.25V reference and generates an error signal (V
C
).
When V
C
is below the powersave mode threshold voltage the automatic powersave-mode is activated and the hyster-
etic comparator disables the power circuitry, with only the low-power circuitry still active (total current consumption is
minimized).
When a load is applied, V
FB
decreases; V
C
increases and enables the power circuitry and the device starts switching.
In light loads, the output voltage (and the voltage at FB) will increase until the powersave comparator disables the
power circuitry, causing the output voltage to decrease again. This cycle is repeated resulting in low-frequency ripple at
the output.
POK Function
The POK output indicates if the output voltage is within 90% of the nominal voltage level. As long as the output voltage
is within regulation the open-drain POK output is high impedance. The POK output can be tied to any external voltage
up to a maximum of 5V via a pull-up resistance R3
(see Typical Application on page 10)
. If the output voltage drops
below 90% of the nominal voltage the POK pin is pulled to GND.
Note:
It is important to consider that in shutdown mode the POK output is pulled to V
CC
in order to save current.
AS1343
+
–
PWM
Control
Slope
Compensator
1 MHz
Spread
Spectrum
Ramp
Generator
+
–
–
Powersave
Operation
Control
Shutdown
Control
PWM
Comp
Σ
+
–
1.25V
Ref
Sync Drive
Control
V
OUT
Good
1.13V
g
m
Error
Amp
Shutdown
Powersave
0.9
Ω
NMOS
R
2
R
1
D
1
C
OUT
4.7μF
Output Voltage
5.5V to 42V
C
IN
10μF
Input Voltage
0.9V to 3.6V
Current
Sense
R
C
C
P2
C
C
PGND
5
1
EN
10
FB
7
SWOUT
6
LX
V
C
9
VOUT
GND
3
GND
8
0.3
Ω
PMOS
4
V
CC
2
POK
L
1
6.8μH
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| AS1343A-BTDT-10-1K | 功能描述:IC REG BOOST ADJ 1.4A 10TDFN RoHS:是 类别:集成电路 (IC) >> PMIC - 稳压器 - DC DC 开关稳压器 系列:- 标准包装:50 系列:- 类型:升压（升压） 输出类型:可调式 输出数:1 输出电压:5 V ~ 25 V 输入电压:2.3 V ~ 5.5 V PWM 型:电流模式 频率 - 开关:600kHz，1.2MHz 电流 - 输出:1A 同步整流器:无 工作温度:-40°C ~ 85°C 安装类型:表面贴装 封装/外壳:8-TSSOP，8-MSOP（0.118"，3.00mm 宽） 包装:管件 供应商设备封装:8-MSOP |
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