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参数资料
| 型号： | AS1364-BTDT-AD |
| 厂商： | AUSTRIAMICROSYSTEMS AG |
| 元件分类： | 基准电压源/电流源 |
| 英文描述： | 1A LDO, Low Noise |
| 文件页数： | 14/19页 |
| 文件大小： | 787K |
| 代理商： | AS1364-BTDT-AD |
AS1364
Datasheet - Application Information
www.austriamicrosystems.com
Revision 1.8
14 - 19
9.6 Explanation of Dynamic Specifications
9.6.1 Power Supply Rejection Ratio (PSRR)
Known also as Ripple Rejection, this specification measures the ability of the regulator to reject noise and ripple beyond DC. PSRR is a
summation of the individual rejections of the error amplifier, reference and AC leakage through the series pass transistor. The specification, in
the form of a typical attenuation plot with respect to frequency, shows up the gain bandwidth compromises forced upon the designer in low
quiescent current conditions. Generally:
PSSR =
dB using lower case to indicate AC values
(EQ 15)
Power supply rejection ratio is fixed by the internal design of the regulator. Additional rejection must be provided externally.
9.6.2 Output Capacitor ESR
The series regulator is a negative feedback amplifier, and as such is conditionally stable. The ESR of the output capacitor is usually used to
cancel one of the open loop poles of the error amplifier in order to produce a single pole response. Excessive ESR values may actually cause
instability by excessive changes to the closed loop unity gain frequency crossover point. The range of ESR values for stability is usually shown
either by a plot of stable ESR versus load current, or a limit statement in the datasheet.
Some ceramic capacitors exhibit large capacitance and ESR variations with temperature. Z5U and Y5V capacitors may be required to ensure
stability at temperatures below T
AMB
= -10oC. With X7R or X5R capacitors, a 4.7μF capacitor should be sufficient at all operating temperatures.
Larger output capacitor values (10μF max) help to reduce noise and improve load transient-response, stability and power-supply rejection.
9.6.3 Input Capacitor
An input capacitor at V
IN
is required for stability. It is recommended that a 4.7μF capacitor be connected between the AS1364 power supply
input pin V
IN
and ground (capacitance value may be increased without limit subject to ESR limits). This capacitor must be located at a distance
of not more than 1cm from the V
IN
pin and returned to a clean analog ground. Any good quality ceramic, tantalum, or film capacitor may be used
at the input.
9.6.4 Noise
The regulator output is a DC voltage with noise superimposed on the output. The noise comes from three sources; the reference, the error
amplifier input stage, and the output voltage setting resistors. Noise is a random fluctuation and if not minimized in some applications, will
produce system problems.
9.6.5 Transient Response
The series regulator is a negative feedback system, and therefore any change at the output will take a finite time to be corrected by the error
loop. This “propagation time” is related to the bandwidth of the error loop. The initial response to an output transient comes from the output
capacitance, and during this time, ESR is the dominant mechanism causing voltage transients at the output. More generally:
Units are Volts, Amps, Ohms.
(EQ 16)
Thus an initial +50mA change of output current will produce a -12mV transient when the ESR=240m
. Remember to keep the ESR within
stability recommendations when reducing ESR by adding multiple parallel output capacitors.
After the initial ESR transient, there follows a voltage droop during the time that the LDO feedback loop takes to respond to the output change.
This drift is approx. linear in time and sums with the ESR contribution to make a total transient variation at the output of:
Units are Volts, Seconds, Farads, Ohms.
(EQ 17)
Where:
C
LOAD
is output capacitor
T = Propagation delay of the LDO
This shows why it is convenient to increase the output capacitor value for a better support for fast load changes. Of course the formula holds for
t < “propagation time”, so that a faster LDO needs a smaller cap at the load to achieve a similar transient response. For instance 50mA load
current step produces 50mV output drop if the LDO response is 1usec and the load cap is 1μF.
There is also a steady state error caused by the finite output impedance of the regulator. This is derived from the load regulation specification
discussed above.
20
Log
V
V
IN
---------------
V
TRANSIENT
I
OUTPUT
R
ESR
=
V
TRANSIENT
I
OUTPUT
=
R
ESR
C
LOAD
-----T
+
相关PDF资料 |
PDF描述 |
|---|---|
| AS1367-BTDT-12 | Adaptive LDO |
| AS1367-BTDT-18 | Adaptive LDO |
| AS1367-BTDT-30 | Adaptive LDO |
| AS1367-BTDT-33 | Adaptive LDO |
| AS1367-BTDT-45 | Adaptive LDO |
相关代理商/技术参数 |
参数描述 |
|---|---|
| AS1364-BTDT-AD EB | 制造商:ams 功能描述:Evaluation Board |
| AS1364-BTDT-AD-1k | 功能描述:低压差控制器 - LDO RoHS:否 制造商:Micrel 最大输入电压:5.5 V 输出电压:Adjustable 输出电流:10 mA 负载调节: 输出类型:Adjustable, Fixed 输出端数量:1 最大工作温度:+ 125 C 安装风格:SMD/SMT 封装 / 箱体:SOT-23-6 |
| AS1364-TD-18_EK_ST | 功能描述:AS1364 1 - Single Channels per IC Positive Fixed Linear Voltage Regulator Evaluation Board 制造商:ams 系列:- 零件状态:有效 每 IC 通道数:1 - 单 电压 - 输出:1.8V 电流 - 输出:1A 电压 - 输入:2 V ~ 5.5 V 稳压器类型:正，固定式 工作温度:-40°C ~ 85°C 板类型:完全填充 所含物品:板 使用的 IC/零件:AS1364 标准包装:1 |
| AS1364-TD-45_EK_ST | 功能描述:AS1364 1 - Single Channels per IC Positive Fixed Linear Voltage Regulator Evaluation Board 制造商:ams 系列:- 零件状态:有效 每 IC 通道数:1 - 单 电压 - 输出:4.5V 电流 - 输出:1A 电压 - 输入:2 V ~ 5.5 V 稳压器类型:正，固定式 工作温度:-40°C ~ 85°C 板类型:完全填充 所含物品:板 使用的 IC/零件:AS1364 标准包装:1 |
| AS1364-TD-AD_EK_ST | 功能描述:AS1364 1 - Single Channels per IC Positive Adjustable Linear Voltage Regulator Evaluation Board 制造商:ams 系列:- 零件状态:有效 每 IC 通道数:1 - 单 电压 - 输出:3.3V 电流 - 输出:1A 电压 - 输入:2 V ~ 5.5 V 稳压器类型:正，可调式 工作温度:-40°C ~ 85°C 板类型:完全填充 所含物品:板 使用的 IC/零件:AS1364 标准包装:1 |
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