参数资料
型号: AS1917V-T
厂商: ams
文件页数: 9/15页
文件大小: 0K
描述: IC SUPERVISOR ACT HIGH SOT23-5
标准包装: 1
类型: 简单复位/加电复位
监视电压数目: 1
输出: 推挽式,图腾柱
复位: 高有效
复位超时: 最小为 100 ms
电压 - 阀值: 1.58V
工作温度: -40°C ~ 125°C
安装类型: 表面贴装
封装/外壳: SC-74A,SOT-753
供应商设备封装: SOT-23-5
包装: 标准包装
其它名称: AS1917V-TDKR
AS1916 - AS1918
Datasheet - D e t a i l e d D e s c r i p t i o n
8.2 Watchdog Input
The integrated watchdog feature can be used to monitor processor activity via pin WDI, and can detect pulses as short as 50ns. The watchdog
requires that the processor toggle the watchdog logic input at regular intervals, within a specified minimum timeout period (1.5s, typ). A reset is
asserted for the reset timeout period. As long as reset is asserted, the timer remains cleared and is not incremented. When reset is deasserted,
the watchdog timer starts counting ( Figure 11 ).
Note: The watchdog timer can be cleared with a reset pulse or by toggling WDI.
Figure 11. Watchdog Timing Relationship
VCC
t RST
RESETN
t RP
t WD
t RP
WDI
The RESET signal is the inverse of the RESETN signal.
The watchdog is internally driven low during most (87.5%) of the watchdog timeout period (see t WD on page 5 ) and high for the rest of the
watchdog timeout period. When pin WDI is left unconnected, this internal driver clears the watchdog timer every 1.4s. When WDI is tri-stated or
is not connected, the maximum allowable leakage current is 10μA and the maximum allowable load capacitance is 200pF.
Note: The watchdog function can be disabled by leaving pin WDI unconnected or connecting it to a tri-state output buffer.
8.3 Manual Reset Input
The active-low pin MRN is used to force a manual reset. This input can be driven by CMOS logic levels or with open-drain collector outputs.
Pulling MRN low asserts a reset which will remain asserted as long as MRN is kept low, and for the timeout period (see t RP on page 4 ) after
MRN goes high (140ms min). The manual reset circuitry has an internal 50k Ω pullup resistor, thus it can be left open if not used.
To create a manual-reset circuit, connect a normally open momentary switch from pin MRN to GND (see Figure 1 on page 1) ; external debounce
circuitry is not required in this configuration.
If MRN is driven via long cables or the device is used in a noisy environment, a 0.1μF capacitor between pin MRN and GND will provide
additional noise immunity.
www.austriamicrosystems.com/Supervisors/AS1916
Revision 1.04
8 - 14
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