参数资料
型号: AS7620A-BQFT
厂商: ams
文件页数: 8/16页
文件大小: 0K
描述: IC REG BUCK ADJ 0.5A 12MLPQ
设计资源: Design Support Tool
标准包装: 6,000
类型: 降压(降压)
输出类型: 可调式
输出数: 1
输出电压: 1.2 V ~ 32 V
输入电压: 3.6 V ~ 32 V
PWM 型: 混合物
电流 - 输出: 500mA
同步整流器:
工作温度: -40°C ~ 85°C
安装类型: 表面贴装
封装/外壳: 12-VQFN 裸露焊盘
包装: 带卷 (TR)
供应商设备封装: 12-MLPQ(4x4)
AS7620
Datasheet - D e t a i l e d D e s c r i p t i o n
8 Detailed Description
Figure 17. System Diagram of AS7620-A with Early Power Fail Warning
3.6V to 32V
V IN
C IN
3.3V
2.2μF
R 6
R 7
V IN
R 3
V HYS
L X
10μH
V OUT
SHDN
R 4
V EPF
R 5
AS7620-A
FB
D 1 C OUT
100μF
R 1
R 3
C 1
PF
PG
Table 4. AS7620 Output Voltage Options
AS7620
V OUT
AS7620A-BQFT
ADJ.
I LIM
J 1
J 2
AS7620B-BQFT
3.3V
8.1 Shut Down
The device can be shut down by providing a voltage lower than 1V at the SHDN pin (7). In this condition, the consumption is only 1μA (typ). The
AS7620 is providing an internally regulated pull-up circuit. No external pull-up resistor shall be used, which could otherwise damage the
shutdown input. Connect the SHDN input directly to an open drain port only.
8.2 Soft Start
The device implements a soft start by limiting the inrush current into the output choke. Initially, the internal PMOS is turned on until the current
reaches the programmed current limit (see Current Limit on page 9) and then is immediately turned off. It will be turned on again when the
current approaches 0A. In this time frame, the FB voltage (V FB ) will be lower than the reference and so the duty cycle will be driven by the
current limit only.
8.3 Regulation
Both AS7620-A and AS7620-B are based on a hysteretic control method. Moreover, the switch current is monitored to make the converter
always work in discontinuous current mode (DCM). The advantages of this type of control system can be summarized as following:
High efficiency even at light load
Intrinsically stable
Simplicity
Readiness during the load transient
The internal PMOS is switched on when the V FB is lower than V REF -V HYST /2 and the current is 0A (DCM). The on time will be terminated if the
V FB is over V REF +V HYST /2 or if the current limit (CL) is triggered. In practice, considering the most common application conditions (L=10μH ÷
100μH; C=10μF - 100μF) and setting the CL threshold according to the load, the on time is normally terminated by the CL intervention and the
output voltage ripple will stay within 1.25% of the output voltage (typ) or V HYST * V OUT / V REF .
www.ams.com/DC-DC_Step-Up/AS7620
Revision 1.18
8 - 16
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