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参数资料
| 型号： | AS7C31024B-12JCN |
| 厂商： | ALLIANCE SEMICONDUCTOR CORP |
| 元件分类： | DRAM |
| 英文描述： | 8-Bit Parallel-Out Serial Shift Registers 14-SO -40 to 85 |
| 中文描述： | 128K X 8 STANDARD SRAM, 12 ns, PDSO32 |
| 封装： | 0.400 INCH, LEAD FREE, PLASTIC, SOJ-32 |
| 文件页数： | 6/9页 |
| 文件大小： | 120K |
| 代理商： | AS7C31024B-12JCN |
AS7C31024B
3/24/04, v.1.2
Alliance Semiconductor
P. 6 of 9
Write waveform 2 (CE1 and CE2 controlled)
10,11,12
AC test conditions
Notes
1
2
3
4
5
6
7
8
9
10 N/A
11
12 CE1 and CE2 have identical timing.
13 C = 30 pF, except all high Z and low Z parameters where C = 5 pF.
14 N/A
During V
CC
power-up, a pull-up resistor to V
CC
on CE1 is required to meet I
SB
specification.
This parameter is sampled and not 100% tested.
For test conditions, see
AC Test Conditions
, Figures A, and B.
t
CLZ
and t
CHZ
are specified with CL = 5pF, as in Figure C. Transition is measured ±500 mV from steady-state voltage.
This parameter is guaranteed, but not 100% tested.
WE is high for read cycle.
CE1 and OE are low and CE2 is high for read cycle.
Address valid prior to or coincident with CE1 transition Low.
All read cycle timings are referenced from the last valid address to the first transitioning address.
All write cycle timings are referenced from the last valid address to the first transitioning address.
t
AW
Address
CE1
WE
D
OUT
t
CW1
, t
CW2
t
WP
t
DW
Data valid
t
DH
t
AH
t
WR
t
WC
t
AS
CE2
D
IN
t
WZ
255
– Output load: see Figure B.
– Input pulse level: GND to 3.0V. See Figure A.
– Input rise and fall times: 2 ns. See Figure A.
– Input and output timing reference levels: 1.5V.
C
13
320
D
OUT
GND
+3.3V
168
Thevenin equivalent:
D
OUT
+1.728V
Figure B: 3.3V Output load
10%
90%
10%
90%
GND
+3.0V
Figure A: Input pulse
2 ns
相关PDF资料 |
PDF描述 |
|---|---|
| AS7C31024B-12STC | 8-Bit Parallel-Out Serial Shift Registers 14-SO -40 to 85 |
| AS7C31024B-12STCN | 8-Bit Parallel-Out Serial Shift Registers 14-SO -40 to 85 |
| AS7C31024B-12TC | 8-Bit Parallel-Out Serial Shift Registers 14-TSSOP -40 to 85 |
| AS7C31024B-12TCN | 8-Bit Parallel-Out Serial Shift Registers 14-TSSOP -40 to 85 |
| AS7C31024B-12TJC | 8-Bit Parallel-Out Serial Shift Registers 14-TSSOP -40 to 85 |
相关代理商/技术参数 |
参数描述 |
|---|---|
| AS7C31024B-12JCNTR | 功能描述:静态随机存取存储器 1M, 3.3V, 12ns, FAST 128K x 8 Asynch 静态随机存取存储器 RoHS:否 制造商:Cypress Semiconductor 存储容量:16 Mbit 组织:1 M x 16 访问时间:55 ns 电源电压-最大:3.6 V 电源电压-最小:2.2 V 最大工作电流:22 uA 最大工作温度:+ 85 C 最小工作温度:- 40 C 安装风格:SMD/SMT 封装 / 箱体:TSOP-48 封装:Tray |
| AS7C31024B-12STC | 制造商:ALSC 制造商全称:Alliance Semiconductor Corporation 功能描述:3.3V 128K X 8 CMOS SRAM |
| AS7C31024B-12STCN | 制造商:ALSC 制造商全称:Alliance Semiconductor Corporation 功能描述:3.3V 128K X 8 CMOS SRAM |
| AS7C31024B-12TC | 制造商:ALSC 制造商全称:Alliance Semiconductor Corporation 功能描述:3.3V 128K X 8 CMOS SRAM |
| AS7C31024B-12TCN | 功能描述:静态随机存取存储器 1M, 3.3V, 12ns, FAST 128K x 8 Asynch 静态随机存取存储器 RoHS:否 制造商:Cypress Semiconductor 存储容量:16 Mbit 组织:1 M x 16 访问时间:55 ns 电源电压-最大:3.6 V 电源电压-最小:2.2 V 最大工作电流:22 uA 最大工作温度:+ 85 C 最小工作温度:- 40 C 安装风格:SMD/SMT 封装 / 箱体:TSOP-48 封装:Tray |
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