参数资料
型号: AS7C3256
厂商: Alliance Semiconductor Corporation
元件分类: 8位微控制器
英文描述: ECONOLINE: RSZ/P - 1kVDC
中文描述: ECONOLINE:RSZ / P - 1kVDC 2kVDC隔离UL94V - 0封装材料所需的散热片,无外置。组件所需的环形磁ContinuousShort电路保护(/ P的后缀)
文件页数: 2/9页
文件大小: 301K
代理商: AS7C3256
AS7C3256A-8
3/22/05; v.1.0
Alliance Semiconductor
P. 2 of 9
Functional description
The AS7C3256A is a 3.3V high-performance CMOS 262,144-bit Static Random-Access Memory (SRAM) device
organized as 32,768 words × 8 bits. It is designed for memory applications requiring fast data access at low voltage,
including Pentium
TM
, PowerPC
TM
, and portable computing. Alliance’s advanced circuit design and process techniques
permit 3.3V operation without sacrificing performance or operating margins.
The device enters
standby mode
when
CE
is high. CMOS standby mode consumes 7.2 mW. Normal operation offers 75%
power reduction after initial access, resulting in significant power savings during CPU idle, suspend, and stretch mode.
Equal address access and cycle time (t
AA
, t
RC
, t
WC
) of 8 ns with output enable access time (t
OE
) of 5 ns are ideal for high-
performance applications. The chip enable (
CE
) input permits easy memory expansion with multiple-bank memory
organizations.
A write cycle is accomplished by asserting chip enable (
CE
) and write enable (
WE
) LOW. Data on the input pins I/O0-I/O7
is written on the rising edge of
WE
(write cycle 1) or
CE
(write cycle 2). To avoid bus contention, external devices should
drive I/O pins only after outputs have been disabled with output enable (
OE
) or write enable (
WE
).
A read cycle is accomplished by asserting chip enable (
CE
) and output enable (
OE
) LOW, with write enable (
WE
) high. The
chip drives I/O pins with the data word referenced by the input address. When chip enable or output enable is high, or write
enable is low, output drivers stay in high-impedance mode.
All chip inputs and outputs are TTL-compatible. Operation is from a single 3.3 ±0.3V supply. The AS7C3256A is packaged
in high volume industry standard packages.
Absolute maximum ratings
Stresses greater than those listed under
Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress rating only and functional
operation of the device at these or any other conditions outside those indicated in the operational sections of this specification is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect reliability.
Truth table
Key
:
X = Don’t care, L = Low, H = High
Parameter
Symbol
V
t1
V
t2
P
D
T
stg
T
bias
I
OUT
Min
–0.5
Max
+5.0
Unit
V
Voltage on V
CC
relative to GND
Voltage on any pin relative to GND
–0.5
V
CC
+ 0.5
1.0
+150
V
Power dissipation
Storage temperature (plastic)
W
o
C
o
C
–65
Ambient temperature with V
CC
applied
DC current into outputs (low)
–55
+125
20
mA
CE
WE
OE
Data
Mode
H
L
X
H
X
H
High Z
High Z
Standby (I
SB
, I
SB1
)
Output disable (I
CC
)
Read (I
CC
)
Write (I
CC
)
L
H
L
D
OUT
D
IN
L
L
X
相关PDF资料
PDF描述
AS7C3256-12 Quadruple D-Type Flip-Flops With Clear 16-SO -40 to 85
AS7C3256-15 Quadruple D-Type Flip-Flops With Clear 16-TSSOP -40 to 85
AS7C3256-20 Quadruple D-Type Flip-Flops With Clear 16-TSSOP -40 to 85
AS7C3256A-8 Dual 4-Input Positive-AND Gate 14-SOIC -40 to 85
AS7C3256A-8JC Dual 4-Input Positive-AND Gate 14-SSOP -40 to 85
相关代理商/技术参数
参数描述
AS7C3256-10JC 制造商:未知厂家 制造商全称:未知厂家 功能描述:x8 SRAM
AS7C3256-10JI 制造商:未知厂家 制造商全称:未知厂家 功能描述:x8 SRAM
AS7C3256-10PC 制造商:未知厂家 制造商全称:未知厂家 功能描述:x8 SRAM
AS7C3256-10TC 制造商:未知厂家 制造商全称:未知厂家 功能描述:x8 SRAM
AS7C3256-12 制造商:ALSC 制造商全称:Alliance Semiconductor Corporation 功能描述:High Performance 32Kx8 CMOS SRAM