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参数资料
| 型号： | ASM2I2314ANZ-28-ST |
| 厂商： | ALLIANCE SEMICONDUCTOR CORP |
| 元件分类： | 时钟及定时 |
| 英文描述： | Circular Connector; No. of Contacts:56; Series:MS27508; Body Material:Aluminum; Connecting Termination:Crimp; Connector Shell Size:24; Circular Contact Gender:Pin; Circular Shell Style:Box Mount Receptacle; Insert Arrangement:24-4 RoHS Compliant: No |
| 中文描述： | 2314 SERIES, LOW SKEW CLOCK DRIVER, 14 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO28 |
| 封装： | 0.300 INCH, SOIC-28 |
| 文件页数： | 3/13页 |
| 文件大小： | 515K |
| 代理商： | ASM2I2314ANZ-28-ST |
June 2005
rev 0.4
ASM2I2314ANZ
14 Output, 3.3V SDRAM Buffer for Desktop PCs with 3 DIMMs
3 of
13
Notice: The information in this document is subject to change without notice.
Serial Configuration Map
The Serial bits will be read by the clock driver in the
following order:
Byte 0 - Bits 7, 6, 5, 4, 3, 2, 1, 0
Byte 1 - Bits 7, 6, 5, 4, 3, 2, 1, 0
Byte N - Bits 7, 6, 5, 4, 3, 2, 1, 0
Reserved bits should be programmed to “0” or “1”.
Serial interface address for the ASM2I2314ANZ is:
A6
A5
A4
A3
1
1
0
1
A2
0
A1
0
A0
1
R/W
----
Byte 0:SDRAM Active/Inactive Register
(1 = Enable, 0 = Disable), Default = Enable
Bit
Pin #
Description
Bit 7
11
SDRAM5 (Active/Inactive)
Bit 6
10
SDRAM4 (Active/Inactive)
Bit 5
--
Reserved
Bit 4
--
Reserved
Bit 3
7
SDRAM3 (Active/Inactive)
Bit 2
6
SDRAM2 (Active/Inactive)
Bit 1
3
SDRAM1 (Active/Inactive)
Bit 0
2
SDRAM0 (Active/Inactive)
Byte 1: SDRAM Active/Inactive Register
(1 = Enable, 0 = Disable), Default = Enable
Bit
Pin #
Description
Bit 7
27
SDRAM11 (Active/Inactive)
Bit 6
26
SDRAM10 (Active/Inactive)
Bit 5
23
SDRAM9 (Active/Inactive)
Bit 4
Bit 3
Bit 2
22
--
--
SDRAM8 (Active/Inactive)
Reserved
Reserved
Bit 1
19
SDRAM7 (Active/Inactive)
Bit 0
18
SDRAM6 (Active/Inactive)
Byte 2: SDRAM Active/Inactive Register
(1 = Enable, 0 = Disable), Default = Enable
Bit
Pin #
Description
Bit 7
17
SDRAM13 (Active/Inactive)
Bit 6
12
SDRAM12 (Active/Inactive)
Bit 5
--
Reserved
Bit 4
--
Reserved
Bit 3
--
Reserved
Bit 2
--
Reserved
Bit 1
--
Reserved
Bit 0
--
Reserved
Note 1 : When the value of bit in these bytes is high, the output is enabled. When the value of the bit is low, the output is forced to low state. The default value
of all the bits is high after chip is powered up.
IIC Byte Flow
Byte
Description
1
IIC Address
2
Command (dummy value, ignored)
3
Byte Count (dummy value, ignored)
4
IIC Data Byte 0
5
IIC Data Byte 1
6
IIC Data Byte 2
相关PDF资料 |
PDF描述 |
|---|---|
| ASM2I2314AGNZ-28-SR | 14 Output, 3.3V SDRAM Buffer for Desktop PCs with 3 DIMMs |
| ASM2I2314AGNZ-28-ST | 14 Output, 3.3V SDRAM Buffer for Desktop PCs with 3 DIMMs |
| ASM2I2318AGNZ-48-AR | 18 Output, 3.3V SDRAM Buffer for Desktop PCs with 3 DIMMs |
| ASM2I2318AGNZ-48-AT | 18 Output, 3.3V SDRAM Buffer for Desktop PCs with 3 DIMMs |
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相关代理商/技术参数 |
参数描述 |
|---|---|
| ASM2I2318AGNZ-48-AR | 制造商:ALSC 制造商全称:Alliance Semiconductor Corporation 功能描述:18 Output, 3.3V SDRAM Buffer for Desktop PCs with 3 DIMMs |
| ASM2I2318AGNZ-48-AT | 制造商:ALSC 制造商全称:Alliance Semiconductor Corporation 功能描述:18 Output, 3.3V SDRAM Buffer for Desktop PCs with 3 DIMMs |
| ASM2I2318ANZ | 制造商:ALSC 制造商全称:Alliance Semiconductor Corporation 功能描述:18 Output, 3.3V SDRAM Buffer for Desktop PCs with 3 DIMMs |
| ASM2I2318ANZ-48-AR | 制造商:ALSC 制造商全称:Alliance Semiconductor Corporation 功能描述:18 Output, 3.3V SDRAM Buffer for Desktop PCs with 3 DIMMs |
| ASM2I2318ANZ-48-AT | 制造商:ALSC 制造商全称:Alliance Semiconductor Corporation 功能描述:18 Output, 3.3V SDRAM Buffer for Desktop PCs with 3 DIMMs |
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