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参数资料
| 型号： | ASM2I2318ANZ-48-AT |
| 厂商： | ALLIANCE SEMICONDUCTOR CORP |
| 元件分类： | 时钟及定时 |
| 英文描述： | Circular Connector; No. of Contacts:61; Series:MS27508; Body Material:Aluminum; Connecting Termination:Crimp; Connector Shell Size:24; Circular Contact Gender:Pin; Circular Shell Style:Box Mount Receptacle; Insert Arrangement:24-61 RoHS Compliant: No |
| 中文描述： | 2318 SERIES, LOW SKEW CLOCK DRIVER, 18 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO48 |
| 封装： | 0.300 INCH, SSOP-48 |
| 文件页数： | 6/13页 |
| 文件大小： | 547K |
| 代理商： | ASM2I2318ANZ-48-AT |
June 2005
rev 0.3
Switching Characteristics
1
ASM2I2318ANZ
18 Output, 3.3V SDRAM Buffer for Desktop PCs with 3 DIMMs
6 of
13
Notice: The information in this document is subject to change without notice.
Parameter
Name
Test Conditions
Min
Typ
Max
Unit
F
in
Maximum Operating Frequency
Duty cycle
2,3
= t
2
÷ t
1
-
-
133
MHz
t
D
Measured at 1.5V
Measured between 0.4V and
2.4V
Measured between 2.4V and
0.4V
All outputs equally loaded
45.0
50.0
55.0
%
t
3
Rising Edge Rate
3
1
2
4
V/nS
t
4
Falling Edge Rate
3
1
2
4
V/nS
t
5
Output to Output Skew
3
SDRAM Buffer LH Prop. Delay
3
SDRAM Buffer HL Prop. Delay
3
SDRAM Buffer Enable Delay
3
SDRAM Buffer Disable Delay
3
Rise Time for SDATA
(Refer Test Circuit for IIC)
Refer figure no.3
Fall Time for SDATA
(Refer Test Circuit for IIC)
Refer figure no.3
150
225
pS
t
6
Input edge greater than 1 V/nS
1
2.7
3.5
nS
t
7
Input edge greater than 1 V/nS
1
2.7
3.5
nS
t
PLZ,
t
PHZ
Input edge greater than 1 V/nS
1
3
5
nS
t
PZL,
t
PZH
Input edge greater than 1 V/nS
1
3
5
nS
C
L
= 10pF
6
t
r
C
L
= 400pF
250
nS
C
L
= 10pF
20
t
f
C
L
= 400pF
250
nS
Note: 1. All parameters specified with loaded outputs.
2. Duty cycle of input clock is 50%. Rising and falling edge rate is greater than 1V/nS
3. Parameter is guaranteed by design and characterization. Not 100% tested in production
.
Test Circuit for SDRAM Enable and Disable Times
Figure 1. Load circuit for Switching times
PULSE
GENERATOR
D.U.T
V
O
V
I
V
DD
R
T
500
S
1
500
C
L
2
*
V
DD
Open
V
SS
TEST S
1
t
6
/t
7
Open
t
PLZ
/t
PZL
2
*
V
DD
t
PHZ
/t
PZH
V
SS
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| ASM2I3805AG-20-AR | 制造商:ALSC 制造商全称:Alliance Semiconductor Corporation 功能描述:3.3V CMOS Buffer Clock Driver |
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| ASM2I3805AG-20-SR | 制造商:ALSC 制造商全称:Alliance Semiconductor Corporation 功能描述:3.3V CMOS Buffer Clock Driver |
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