参数资料
型号: ASM2P3805AHG-20-SR
厂商: ALLIANCE SEMICONDUCTOR CORP
元件分类: 时钟及定时
英文描述: Circular Connector; No. of Contacts:4; Series:MS27468; Body Material:Aluminum; Connecting Termination:Crimp; Connector Shell Size:9; Circular Contact Gender:Pin; Circular Shell Style:Jam Nut Receptacle; Insert Arrangement:9-44 RoHS Compliant: No
中文描述: 3805 SERIES, LOW SKEW CLOCK DRIVER, 5 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO20
封装: 0.300 INCH, GREEN, SOIC-20
文件页数: 6/13页
文件大小: 534K
代理商: ASM2P3805AHG-20-SR
June 2005
rev 0.2
Switching Characteristics Over Operating Range – Commercial
3,4
ASM2P3805AH
3.3V CMOS Buffer Clock Driver
6 of 13
Notice: The information in this document is subject to change without notice.
ASM2P3805A
Min
2
ASM2P3805AH
Min
2
Symbol
Parameter
Conditions
1
Max
Max
Unit
t
PLH
t
PHL
t
R
t
F
Propagation Delay
IN
A
to OA
n
, IN
B
to OB
n
Output Rise Time (0.8V to 2.0V)
Output Fall Time (2.0V to 0.8V)
Output skew: skew between outputs of all
banks of same package
(inputs tied together)
Pulse skew: skew between opposite
transitions of same output (|t
PHL
-– t
PLH
|)
Package skew: skew between outputs of
different packages at same power supply
voltage, temperature, package type and
speed grade
Output Enable Time
OE
ˉˉ
A
to OA
n
, OE
ˉˉ
B
to OB
n
Output Disable Time
OE
ˉˉ
A
to OA
n
, OE
ˉˉ
B
to OB
n
1.5
5.8
1.5
5
nS
-
-
2
2
-
-
2
2
nS
nS
t
SK(O)
-
0.5
-
0.5
nS
t
SK(P)
-
1
-
1
nS
t
SK(T)
-
1.5
-
1.2
nS
t
PZL
t
PZH
t
PLZ
t
PHZ
1.5
6.5
1.5
6
nS
C
L
= 50pF
R
L
= 500
1.5
5.5
1.5
5
nS
Switching Characteristics Over Operating Range – Industrial
3,4
ASM2P3805A
Min
2
ASM2P3805AH
Min
2
Symbol
Parameter
Conditions
1
Max
Max
Unit
t
PLH
t
PHL
t
R
t
F
Propagation Delay
IN
A
to OA
n
, IN
B
to OB
n
Output Rise Time
(0.8V to 2.0V)
Output Fall Time
(2.0V to 0.8V)
Output skew: skew between outputs of all
banks of same package (inputs tied
together)
Pulse skew: skew between opposite
transitions of same output (|t
PHL
-– t
PLH
|)
Package skew: skew between outputs of
different packages at same power supply
voltage, temperature, package type and
speed grade
Output Enable Time
OE
ˉˉ
A
to OA
n
,
OE
ˉˉ
B
to OB
n
Output Disable Time
OE
ˉˉ
A
to OA
n
,
OE
ˉˉ
B
to OB
n
Note: 1. See test circuits and waveforms.
2. Minimum limits are guaranteed but not tested on Propagation Delays.
3. t
, t
, t
are production tested. All other parameters guaranteed but not production tested.
4. Propagation delay range indicated by Min. and Max. limit is due to V
CC
, operating temperature and process parameters. These propagation delay
limits do not imply skew.
1.5
5.8
1.5
5.2
nS
-
-
2
2
-
-
2
2
nS
nS
t
SK(O)
-
0.6
-
0.6
nS
t
SK(P)
-
1
-
1
nS
t
SK(T)
-
1.5
-
1.2
nS
t
PZL
t
PZH
t
PLZ
t
PHZ
1.5
6.5
1.5
6
nS
C
L
= 50pF
R
L
= 500
1.5
5.5
1.5
5
nS
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ASM2P3805AHG-20-ST 制造商:ALSC 制造商全称:Alliance Semiconductor Corporation 功能描述:3.3V CMOS Buffer Clock Driver
ASM2P3805DG-20-AR 制造商:ALSC 制造商全称:Alliance Semiconductor Corporation 功能描述:3.3V CMOS Dual 1-To-5 Clock Driver
ASM2P3805DG-20-AT 制造商:ALSC 制造商全称:Alliance Semiconductor Corporation 功能描述:3.3V CMOS Dual 1-To-5 Clock Driver
ASM2P3805DG-20-DR 制造商:ALSC 制造商全称:Alliance Semiconductor Corporation 功能描述:3.3V CMOS Dual 1-To-5 Clock Driver
ASM2P3805DG-20-DT 制造商:ALSC 制造商全称:Alliance Semiconductor Corporation 功能描述:3.3V CMOS Dual 1-To-5 Clock Driver