参数资料
型号: ASM5I23S08AF-4-16-TR
厂商: ALLIANCE SEMICONDUCTOR CORP
元件分类: 时钟及定时
英文描述: 3.3V Zero Delay Buffer
中文描述: 23S SERIES, PLL BASED CLOCK DRIVER, 8 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO16
封装: 4.40 MM, TSSOP-16
文件页数: 9/18页
文件大小: 409K
代理商: ASM5I23S08AF-4-16-TR
September 2005
rev 1.4
ASM5P23S08A
3.3V ‘SpreadTrak’ Zero Delay Buffer
9 of 18
Notice: The information in this document is subject to change without notice.
Switching Characteristics for ASM5I23S08 Industrial Temperature Devices
Parameter
Description
Test Conditions
Min
Typ
Max
Unit
1/t
1
Output Frequency
30pF load, All devices
15
100
MHz
1/t
1
Output Frequency
15pF load, -5H devices
8
15
133
MHz
1/t
1
Output Frequency
15pF load, -2, -3, -4 devices
15
133
MHz
Duty Cycle
11
= (t
2
/ t
1
) * 100
( -2, -3, -4, -1H, -5H)
Measured at 1.4V, F
OUT
= <66.66MHz 30pF load
40.0
50.0
60.0
%
Duty Cycle
11
= (t
2
/ t
1
) * 100
( -2, -3, -4, -1H, -5H)
Measured at 1.4V, F
OUT
= <50MHz 15pF load
45.0
50.0
55.0
%
t
3
Output Rise Time
11
( -2, -3, -4)
Measured between 0.8V and 2.0V 30pF load
2.50
nS
t
3
Output Rise Time
11
( -2, -3, -4)
Measured between 0.8V and 2.0V 15pF load
1.50
nS
t
3
Output Rise Time
11
( -5H)
Measured between 0.8V and 2.0V 30pF load
1.50
nS
t
4
Output Fall Time
11
( -2, -3, -4)
Measured between 2.0V and 0.8V 30pF load
2.50
nS
t
4
Output Fall Time
11
( -2, -3, -4)
Measured between 0.8V and 2.0V 15pF load
1.50
nS
t
4
Output Fall Time
11
( -5H)
Measured between 2.0V and 0.8V 30pF load
1.25
nS
Output-to-output skew on
same bank ( -2, -3, -4)
All outputs equally loaded
200
Output-to-output skew
( -5H)
All outputs equally loaded
200
Output bank A -to- output
bank B skew ( -4, -5H)
All outputs equally loaded
200
t
5
Output bank A -to- output
bank B skew (-2, -3)
All outputs equally loaded
400
pS
t
6
Delay, REF Rising Edge
to FBK Rising Edge
Measured at V
DD
/2
0
±250
pS
t
7
Device-to-Device Skew
11
Measured at V
DD
/2 on the FBK pins of the device
0
700
pS
Measured at 66.67MHz, loaded outputs, 15 pF load
200
Measured at 66.67MHz, loaded outputs, 30 pF load
200
t
J
Cycle-to-cycle jitter
11
( -4, -5H)
Measured at 133MHz, loaded outputs, 15 pF load
100
pS
Measured at 66.67MHz, loaded outputs, 30pF load
400
t
J
Cycle-to-cycle jitter
11
(-2, -3)
Measured at 66.67MHz, loaded outputs, 15pF load
400
pS
t
LOCK
PLL Lock Time
11
Stable power supply, valid clock presented on REF
and FBK pins
1.0
mS
Note: 11. Parameter is guaranteed by design and characterization. Not 100% tested in production.
相关PDF资料
PDF描述
ASM5P23S08AF-4-16-TT 3.3V Zero Delay Buffer
ASM5I23S08AF-4-16-TT 3.3V Zero Delay Buffer
ASM5P23S08AG-2-16-ST 3.3V Zero Delay Buffer
ASM5I23S08AG-2-16-ST 3.3V Zero Delay Buffer
ASM5P23S08AG-2-16-TR 3.3V Zero Delay Buffer
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