参数资料
型号: AT24C1024B-TH25-B
厂商: Atmel
文件页数: 3/25页
文件大小: 0K
描述: IC EEPROM 1MBIT 1MHZ 8TSSOP
标准包装: 100
格式 - 存储器: EEPROMs - 串行
存储器类型: EEPROM
存储容量: 1M (128K x 8)
速度: 1MHz
接口: I²C,2 线串口
电源电压: 2.5 V ~ 5.5 V
工作温度: -40°C ~ 85°C
封装/外壳: 8-TSSOP(0.173",4.40mm 宽)
供应商设备封装: 8-TSSOP
包装: 管件
产品目录页面: 1456 (CN2011-ZH PDF)
AT24C1024B
Figure 1-1.
Block Diagram
VCC
GND
WP
SCL
SDA
START
STOP
LOGIC
SERIAL
CONTROL
EN
H.V. PUMP/TIMING
LOAD
LOGIC
A 2
DEVICE
ADDRESS
COMPARATOR
COMP
LOAD
INC
DATA RECOVERY
A 1
A 0
R/W
DATA WORD
ADDR/COUNTER
EEPROM
D IN
Y DEC
SERIAL MUX
D OUT /ACK
LOGIC
D OUT
2. Pin Description
SERIAL CLOCK (SCL): The SCL input is used to positive edge clock data into each EEPROM
device and negative edge clock data out of each device.
SERIAL DATA (SDA): The SDA pin is bi-directional for serial data transfer. This pin is open-
drain driven and may be wire-ORed with any number of other open-drain or open-collector
devices.
DEVICE/ADDRESSES (A1/A2): The A1, A2 pin is a device address input that can be hardwired
or left not connected for hardware compatibility with other AT24Cxx devices. When the A1, A2
pins are hardwired, as many as four 1024K devices may be addressed on a single bus system
(device addressing is discussed in detail under the Device Addressing section). If the A1/A2 pins
are left floating, the A1/A2 pin will be internally pulled down to GND if the capacitive coupling to
the circuit board V CC plane is <3 pF. If coupling is >3 pF, Atmel recommends connecting the
A1/A2 pin to GND.
WRITE PROTECT (WP): The write protect input, when connected to GND, allows normal write
operations. When WP is connected high to V CC , all write operations to the memory are inhibited.
If the pin is left floating, the WP pin will be internally pulled down to GND if the capacitive cou-
pling to the circuit board V CC plane is <3 pF. If coupling is >3 pF, Atmel recommends connecting
the pin to GND. Switching WP to V CC prior to a write operation creates a software write-protect
function.
3
5194F–SEEPR–1/08
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